Mathcad - ee217projtodonew2.mcd

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Simulation Fig. 39: Circuit schematic used in Cadence simulations After the initial design with <strong>Mathcad</strong>, we simulated the circuit using Cadence. Cadence’s IC design tools allow the LNA design to be taken to the next levels of layout and fabrication. Just like its counterpart, Cadence is also capable of displaying stability, gain and noise figure circles on a Smith chart. However, setting up Cadence requires a considerable amount of time to guarantee reliable results. The distortion specification for our LNA is the input-referred third-order intercept point, IIP 3 , which is measured with a two-tone test. The two tone test is simulated by adding two sinusoidal signals at 1.90 GHz and 1.91 GHz to the input, each having a -20 dBm available input power, P in (dB). The amplitude of the third order intermodulation, products, IM3(dB), is then measured by performing a discrete-time Fourier transform of the output signal. When plotted in decibels against input power, the output power and IM 3 curves are relatively straight lines with slopes of 1 and 3 respectively, which is shown in figure 1 below. IIP 3 , is defined as the input power at which the extrapolated IM 3 and output power curves intercept. As we know the slope of each curve and a point through which each one passes, we can easily calculate IIP 3 with a single transient simulation with the following formula: IIP 3 ( dBm) IM 3 ( dB) 2 P in ( dBm) The schematic used for the simulation is presented in figure 39. For additional accuracy in modeling the fabricated amplifier, the inductance of the bonding wires, capacitance of the bonding pads, and the resistance of the bond wires were added to the schematic. The vias from the ground plane of the PC board were calculated to be 0.11nH, and were initially added to the schematic with little effect.
To insure stability over the spectrum, resistors were strategically placed throughout the circuit. The best method to improve low frequency stability is to add a resistance in series with an inductor connected from the signal path to ground. Similarly, high frequency stability is enhanced with a resistance in series with a capacitor connected from the signal path to ground. Resistors degrade the noise and gain performance of the amplifier so it would be desirable to use reactive elements to improve stability. Unfortunately, although reactances affect the input and impedances of the amplifer, they have no effects on the unconditionaly stability factor, K around the K=1 point. In this LNA resistance was intentionally placed in series with the output and input bonding pads to achieve unconditional stability condition at high frequencies. The simulation results for the K-factor of the final version of our circuit have been plotted in Fig. 40 and Fig. 41. Fig. 40: Simulation results for K-factor Fig. 41: A closer look at K-factor at high frequencies
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Page 3 and 4: Introduction Low noise amplifiers a
Page 5 and 6: ∆f: The frequency spacing of the
Page 7 and 8: Architecture Selection Amplifier Ev
Page 9 and 10: Common Base Amplifier To find the d
Page 11 and 12: KCL N, I C , s, Z S , Z L 1 1 1 Z S
Page 13 and 14: 100 10 1 0.1 0.01 0.01 0.1 1 10 100
Page 15 and 16: Ballast Resistor Sizing The term ba
Page 17 and 18: 2000 Ballast Resistor (ohms) 1500 1
Page 19 and 20: Z popt SZ , 0 ∆ S . 11 , S 22 , S
Page 21 and 22: Solve r . b i . bn Z . e β β . V
Page 23 and 24: Noise Correlation Except in special
Page 25 and 26: n is the noise resistance represent
Page 27 and 28: Optimal Source Impedance to Trade-O
Page 29 and 30: Gain Analysis Z2Γ( Z) Z Z G T Γ G
Page 31 and 32: A 3 N, I C , Z S , s 1 , s 2 , s 3
Page 33 and 34: Optimizing Area and Current I C 0.0
Page 35 and 36: Impedance Matching High-pass impeda
Page 37: Low Frequency Stabilization It is d
Page 41: It is possible to use on-chip induc
Page 49: ... . 1 s 1 s 2 s . 3 C je N, I . C

Mathcad - ee217projtodonew2.mcd

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