Mathcad - ee217projtodonew2.mcd

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undesirable. Common Emitter Amplifier For the reasons of stability, low distortion, low noise, and input matching described above, an inductively degenerated common emitter configuration was chosen for the input stage of the amplifier design. The circuit is shown in the following figure. A simplified equation for the intercept point is given in the following equation [2]. I out Z S V S L e Fig. 3: Matched Degenerated Common Emitter LNA IP 3ce 10 10 log 8I . 4. Cce ω 4 . 4 L e . 1 2 V T I . C τ F V . T C . je0 Area 2 . Intercept Point of a Common-Emitter LNA Now that the first stage of the amplifier is chosen, we still have the architectural choice of adding a common base configuration (the cascode) to the output of the common emitter (the driver) configuration. This configuration is also known as a cascode configuration. The cascode configuration has the increased gain and reverse isolation advantages of all cascaded amplifiers. Unfortunately it also has the reduced dynamic range disadvantage of cascaded amplifiers from increased distortion and increased noise. When the cascode configuration is compared against two cascaded common emitter amplifiers, we see the performance is much worse. This is because first the common emitter is not matched to the common base and second because the second common base stage is not degenerated resulting in higher distortion. This disadvantage is reduced at lower frequencies as will be discussed below. If a primary goal of the amplifier was low noise and high gain it is possible to increase the performance of the amplifier with an impedance matching circuit between the common emitter and common base transistors. Unfortunately, this has the undesirable effect of reducing input referred distortion. This distortion increase comes from two different mechanisms. The first mechanism is from the increased swing at the emitter of the cascode transistor, which increases the distortion in the cascode transistor. The second mechanism comes from saturating the collector of first stage amplifier. The second mechanism can be alieviated with a higher bias for the base of the cascode transistor. In general the distortion of the cascode configuration is pretty bad without matching so it is undesirable to match the cascode and driver. An important advantage of the cascode configuration is it’s simplicity and it’s inherent bias current sharing, which shows up in cost and area comparisons. Ultimately the system requirements will justify one amplifier over another.
Common Base Amplifier To find the distortion of the cascode configuration we analyze the distortion due to the driver transistor and the cascode transistor separately. To find the distortion of the common base amplifier, we input-refer the distortion through an linear inductively degenerated transconductor. The result of the distortion from this configuration is given in the following equation. I out V S Z S V π g m* V π L e IP 3cb 10 10 log Fig. 4: Common-base LNA (input-referred through ideal transconductor) 4I . 3. Ccb ω . 2 L e C . je0 Area . cb V T . Intercept Point of Common-Base LNA Now the distortion due to the common-emitter device can be compared to the distortion from the common base device in a cascode configuration. The following equation is result of taking the difference between the intercept point. From this difference equation we can see the common base is the dominant source of distortion at high frequencies and for large emitter degeneration. For typical values L e =1.5nH, I C =6mA, f=1.9GHz, f T =20GHz, the common emitter is 5.4dB more linear than the input referred common base. Which reduces the overall distortion of the cascode amplifier to 6.5dB below that of the common emitter alone. Intercept Point Difference between IP 3ce IP 3cb 3dB 20logg . . m ω . L e 10. log ω Common Base and Common Emitter Cascode LNA ω T V S Z S I out L e Fig. 5: Cascode LNA IP 3ce IP 3cb 10 10 IP 3cascode 10. log 10 10 IP 3ce 10. log 1 10 ∆IP 3ce_cb 10 Intercept Point of a Cascode LNA
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Page 3 and 4: Introduction Low noise amplifiers a
Page 5 and 6: ∆f: The frequency spacing of the
Page 7: Architecture Selection Amplifier Ev
Page 11 and 12: KCL N, I C , s, Z S , Z L 1 1 1 Z S
Page 13 and 14: 100 10 1 0.1 0.01 0.01 0.1 1 10 100
Page 15 and 16: Ballast Resistor Sizing The term ba
Page 17 and 18: 2000 Ballast Resistor (ohms) 1500 1
Page 19 and 20: Z popt SZ , 0 ∆ S . 11 , S 22 , S
Page 21 and 22: Solve r . b i . bn Z . e β β . V
Page 23 and 24: Noise Correlation Except in special
Page 25 and 26: n is the noise resistance represent
Page 27 and 28: Optimal Source Impedance to Trade-O
Page 29 and 30: Gain Analysis Z2Γ( Z) Z Z G T Γ G
Page 31 and 32: A 3 N, I C , Z S , s 1 , s 2 , s 3
Page 33 and 34: Optimizing Area and Current I C 0.0
Page 35 and 36: Impedance Matching High-pass impeda
Page 37 and 38: Low Frequency Stabilization It is d
Page 39 and 40: To insure stability over the spectr
Page 41: It is possible to use on-chip induc
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