Controller - Institute of Transportation Engineers

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CPU / FCU operation at POWER UP shall be as follows: 5.4.2.11.7 1. FCU Comm Loss Flag set. FAULT and VOLTAGE MONITOR outputs set to FALSE state. 2. CPU REQUEST MODULE STATUS COMMAND Message with “E” bit set is sent to FCU to clear Comm Loss Flag and responses to CPU with “E” bit set. 3. Before the Comm Loss timer expires, the SET OUTPUT COMMAND data must be sent. In that data, the 078 and 079 logically set to “0” will cause the FCU microprocessor port pins assigned for FM and VM outputs to go to their TRUE state. At this point, the signal outputs defined in the message will be permitted at the output connectors. Any number of other messages may be sent between the MODULE STATUS COMMAND and SET OUTPUTS COMMAND. 4. If the above message sequence is not followed, Comm Loss Flag shall be set (or remain) and VM & FM shall retain the FALSE output state. 5. This is operational and preceded User Software. A CPU / FCU Communications Loss during normal operation shall cause all outputs to go blank (FALSE state) and shall set the Comm Loss Flag. FM and VM outputs shall be in FALSE state. 5.4.3 Type 2070N Back Cover The 2070N Back Cover shall be provided to protect the interface harnesses. The Back Cover shall be delivered attached to the 2070 ATMS Controller Unit and 2070-8 NEMA Interface Module per Section 5. 5.5 Chapter Details TABLE OF CONTENTS Type 2070-6 - Async/Modem Serial Comm Module 5-5-1 Type 2070-7 - Serial Comm Module 5-5-2 Type 2070N - NEMA Module, Front View 5-5-3 Type 2070N - NEMA Module, Side View 5-5-4 Type 2070N - NEMA Module, Isometric View 5-5-5 Standard for the ATC – Type 2070 March 29, 2001 92
Type 2070N - NEMA Module, Back Cover 5-5-6 Type 2070N - NEMA Interface I/O Port, Connectors A & B 5-5-7 Type 2070N - NEMA Interface I/O Port, Connectors C & D 5-5-8 Type 2070N - EX1 & EX2 Connector Pinouts 5-5-9 Section Notes: All dimensions are in millimeters. Module sheet metal tolerance shall be 0.38 mm or less. Standard for the ATC – Type 2070 March 29, 2001 93
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A Recommended Standard of the Joint
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Table of Contents 1 FOREWORD.......
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4.4.3 CPU Active Indicator.........
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2 INTRODUCTION 2.1 Overview The Adv
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Type 2070 Controller Unit - Type 20
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3.1.5.3 Cold Rolled Steel Sheet, Ro
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The potentiometer power rating shal
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3.2.13 Wiring, Cabling, and Harness
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Insulation Resistance: 5,000 megohm
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The equipment shall be engineered f
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3.5.1.5 Each PCB connector edge sha
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All circuits, unless otherwise note
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3.7.5.2 The quality control procedu
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The EIA-485 Line Drivers/Receivers
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The 2070-1B CPU shall not draw more
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4.2.4 Transition Board A TRANSITION
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timer34 = access to MC68360's inter
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An Async-Communications Serial Devi
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Note: The inhibit DCD selection has
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4.2.7.2.9.2 Setting Hardware Clock
Page 41 and 42: 4.2.7.4.3 The Error Handler error r
Page 43 and 44: 4.2.7.6.6 OS-9 compliant header fil
Page 45 and 46: 4.3.5.4 One KHz Reference A synchro
Page 47 and 48: Input scanning shall begin at I0 (b
Page 49 and 50: Generate the CRC value Generate the
Page 51 and 52: SCC Transmit Error Count Transmit E
Page 53 and 54: e - r - S - A one-byte leading edge
Page 55 and 56: (Type Number = 182) 1 0 1 1 0 1 1 0
Page 57 and 58: MC Timestamp NMSB x x x x x x x x B
Page 59 and 60: '0' - immediately upon command rece
Page 61 and 62: The timeout value shall be in the r
Page 63 and 64: Each character shall be composed of
Page 65 and 66: 4.4.5.8 Cursor positioning shall be
Page 67 and 68: supply compartment from the back of
Page 69 and 70: Less than 0.2% rms, 1% peak to peak
Page 71 and 72: 4.7 Chapter Details TABLE OF CONTEN
Page 73 and 74: Standard for the ATC - Type 2070 Ma
Page 87 and 88: 2. Modulation: Phase coherent frequ
Page 89 and 90: external screws, except where calle
Page 91: 5.4.2.10 A 22-line minimum HAR 2 Ha
Page 105 and 106: 6 GLOSSARY 6.1.1 Terms and Abbrevia
Page 107 and 108: EEPROM - Electrically Erasable, Pro
Page 109 and 110: NETA - National Electrical Testing
Page 111: VDC - Voltage Direct Current VME -
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