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110 • Linux Symposium 2004 • Volume One 2. the task structure and 3. the kernel stacks. 6.2 Physical to Virtual address Translation In the interruption slow path, where we save all the registers and transition to virtual mode, there is a point where execution must be switched (and hence pointers moved from physical to virtual). Currently, with offset mapping, this is simply done by and addition of __PAGE_OFFSET. However, in the new scheme we cannot do this, nor can we call the address translation functions when in absolute mode. Therefore, we had to reorganise the interruption paths in the PA code so that both the physical and virtual address was available. Currently parisc uses a control register (%cr30) to store the virtual address of the struct thread_info. We altered all paths to change %cr30 to contain the physical address of struct thread_info and also added a physical address pointer to the struct task_struct to the thread info. This is sufficient to perform all the necessary register saves in absolute addressing mode. 6.3 Flushing on Page Freeing as was documented in section 2.3, we need to find a way of flushing a user virtual address after its translation is gone. Actually, this turns out to be quite easy on PARISC. We already have an area of memory (called the tmpalias space) that we use to copy to priming the user cache (it is simply a 4MB memory area we dynamically program to map to the page). Therefore, as long as we know the user virtual address, we can simply flush the page through the tmpalias space. In order to confound any attempted kernel use of this page, we reserve a separate 4MB virtual area that produces a page fault if referenced, and point the page’s virtual address into this when it is removed from process mappings (so that any kernel attempt to use the page produces an immediate fault). Then, when the page is freed, if its virtual pointer is within this range, we convert it to a tmpalias address and flush it using the tmpalias mechanism. 7 Results and Conclusion The best result is that on a parisc machine, the total amount of memory the operational kernel keeps mapped is around 10MB (although this alters depending on conditions). The current implementation makes all pages congruent or equivalent, but the allocation routine contains BUG_ON() asserts to detect if we run out of equivalent addresses. So far, under fairly heavy stress, none of these has tripped. Although the primary reason for the unmapping was to move parisc back within its architectural requirements, it also produces a knock on effect of speeding up I/O by eliminating the cache flushing from kernel to user space. At the time of writing, the effects of this were still unmeasured, but expected to be around 6% or so. As a final side effect, the flush on free necessity releases the parisc from a very stringent “flush the entire cache on process death or exec” requirement that was producing horrible latencies in the parisc fork/exec. With this code in place, we see a vast (50%) improvement in the fork/exec figures. References [1] Andrea Arcangeli 3:1 4:4 100HZ 1000HZ comparison with the HINT benchmark 7 April 2004 http://www.kernel.org/pub/
Linux Symposium 2004 • Volume One • 111 linux/kernel/people/andrea/ misc/31-44-100-1000/ 31-44-100-1000.html [2] Ingo Molnar [announce, patch] 4G/4G split on x86, 64 GB RAM (and more) support 8 July 2003 http://marc.theaimsgroup. com/?t=105770467300001 [3] James E.J. Bottomley Understanding Caching Linux Journal January 2004, Issue 117 p58 [4] Ingo Molnar [patch] simpler ‘highpte’ design 18 February 2002 http://marc.theaimsgroup. com/?l=linux-kernel&m= 101406121032371 [5] Rik van Riel Re: Rmap code? 22 August 2001 http: //marc.theaimsgroup.com/?l= linux-mm&m=99849912207578
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Proceedings of the Linux Symposium
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