FPGA Boards - The Dini Group

More documents

Recommendations

Info

SMA SMA SMA SMA SMA Stacking the DNV7F2A Stacking two DINI Virtex-7 FPGA boards Two boards can be ganged together to increase the amount of available FPGA resources. This example uses the DNV7F2A. In this example, shown in figure 1, two DNV7F2A cards are ganged together, seamlessly doubling the functionality. A DDR3 memory module is added to each of the FPGA cards. The cable We use a custom Samtec cable, DINAR1_CBL to connect the signals across the connectors of the two boards. You get these cables from us. The DINAR1_CLB is a high speed coax cable designed specifically to connect two 400-pin Samtec SEAM connectors together. Initially these cables are 30”, but eventually we will have several different lengths. The busses: YMB and NMB The first cable, marked in Figure 1 with as ‘1’, is required. This cable connects the YMB busses together and adds a bus between the Config FPGAs on the two boards. The second bus is used to connect the NMB busses from the slave FPGA card to the master FPGA card. Full NMB functionality is maintained including DMA data movement between all FPGAs. Also, the host system sees all FPGAs as if they were placed on a single circuit board. The data from the NMB busses on the slave card must be re-clocked in the slave’s Config FPGA, so this adds a few clock cycles of latency. The raw performance measured in terms of GB/s is not compromised. FPGA and other configuration data of the slave DNV7F2A is transferred over this second bus. Configuration of the slave FPGA board is also transparent to the host system and software. FPGA to FPGA Interconnect between boards The DNV7F2A has 4 expansion connectors, two per FPGA. These connectors are yellow in the block diagram and labeled 0 thru 3. When stacking two DNV7F2As, you can connect ANY DINAR1 expansion connector to any other DINAR1 Expansion connector using a DINAR1_CBL. It is perfectly reasonable to connect all four DINAR1 cables between the two DNV7F2As, but that would leave no expansion position open for memory or external peripherals. In the example shown in v 1, I connected three of the expansion connectors together: FPGA 0 DINAR1 3 (master DNV7F2A) → FPGA 1 DINAR1 0 (slave) FPGA 1 DINAR1 0 (master DNV7F2A) → FPGA 0 DINAR1 1 (slave) FPGA 1 DINAR1 2 (master DNV7F2A) → FPGA 0 DINAR1 3 (slave) I choose these connections because it was easy to draw and not for any practical reason. Each of these cables carries 72 LVDS pairs, along with clocks, IDs and resets. I will state again: You can connect ANY DINAR1 connector to any other DINAR1 connector. Note that if you want to increase the interconnect between the FPGAs on a stand-alone DN- V7F2A, you would not use the DINAR1_CBL. Use the DINAR1_INTERCON instead. DDR3 Memory I added a DINAR1_SODM204 to the spare DINAR1 connector on each DNV7F2A. This card hosts a 204-pin SODIMM memory module. In the block diagram, I put an 8 GB DDR3 memory module in the socket. You aren’t limited to DDR3. We have several other SODIMMs that work fine in this slot: • DNSODM204_SSRAM (1.8V version) (SSRAM) • DNSODM204_QUADMIC (4 Mictor connectors) • DNSODM204_SE (Flash and Mobile SDRAM) • DNSODM204_USB (USB2.0 Phy) • DNSODM204_DDR2_FAST (DDR2) • DNSODM204_QDRII+ (QDRII+ SSRAM) • DNSODM204_DDR2_2GB (more DDR2, larger) • DNSODM204_MICTOR_IO (2 Mictors) Overview Figure 2 shows the final functionality of the two DNV7F2As as seen from the host. 12 www.dinigroup.com DINAR1_CABLE 24 MHz 24 MHz YMB + NMB 114.285 MHz Frequency Synthesizer (Si5326) 114.285 MHz Frequency Synthesizer (Si5326) G0 G3 40 GbE or 4, 10 GbE 10GbE Ethernet 24 MHz 24 MHz Figure 1 10GbE Ethernet USB 3.0 / 2.0 SATA II (device) JTAG SATA II 0 1 1 114.285 MHz Frequency Synthesizer (Si5326) 114.285 MHz Frequency Synthesizer (Si5326) QSFP+ SFP+ Socket DNSEAM_NS GTX Expansion G1 G4 2 4 5 6 GTX Expansion DNSEAM_NS SFP+ Socket 24 MHz 1 Config Clk DINAR1_SODM204 DINAR1_SODM204 10/100/1000 baseT USB 2.0 (2X) Stacking PCIe (GEN2) iPASS 4 DINAR1 Expansion Connector OSC 114.285 MHz 1 8 8 1 1 PCIe (GEN2) iPASS Frequency Synthesizer (Si5326) 4 RJ45 RS232 SATA II (host) 2x Global Clocks 72 72 DINAR1 Expansion Connector DDR 3 DDR 3 72 72 4 G2 3 10/100/1000 Phy 6Mb FLASH oot 8Mb SPI FLASH x 64 DR2 5 5 5 DNNMB onnector 400 pins) T T 761] A 0 r Ex FP 7V 7V [F(F/H GEN1 Step Clo RGM 2 R
SMA SMA SMA SMA SMA SMA SMA SMA SMA SMA four Virtex-7 FPGAs | 7V2000T-1 | 56 million ASIC gates Memory / Expansion / Stacking Memory / Expansion / Stacking DINAR1 Expansion Connector 3 DINAR1 Expansion Connector 2 DINAR1 Expansion Connector 0 DINAR1 Expansion Connector 1 USB 3.0 / 2.0 72 72 SATA II (device) 4 72 72 72 72 72 72 2 SATA II PCI EXPRESS Cable (GEN1) 24 MHz 114.285 MHz Frequency Synthesizer (Si5326) G0 10GbE Ethernet 24 MHz JTAG 0 1 114.285 MHz Frequency Synthesizer (Si5326) GTX Expansion DNSEAM_NS SFP+ Socket G1 24 MHz Config Clk OSC 8 1 1 PCIe (GEN2) iPASS 114.285 MHz Frequency Synthesizer (Si5326) 4 G2 FPGA 1 7VX690T 7V2000T [F(F/H)G1761] PCIe (Cabled GEN1/GEN2) Step Clock RS232 Config Clk OSC GTX 10Gb/s NMB0 YMB 150 150 16 Virtex-6 Config FPGA PCIe 40 NMB1 40 YMB NMB 1 NMB 2 40 40 FPGA 0 7VX690T 7V2000T [F(F/H)G1761] SEAF DNNMB Connector (400 pins) 5 5 5 Global Clocks 8 1 4 4 PCIe (GEN2) iPASS Stacking GTX Expansion DNSEAM_NS SFP+ Socket QSFP+ 10GbE Ethernet 40 GbE or 4, 10 GbE 25 NAND B Boot 128M D 12 8 3 64 OSC CPU 4-lanes PCIe (GEN1) PCIe (Gen1) 4 - lanes CPU FPU FPU Device Bus PCIe Marvell MV78200 EEPROM DMA(4x) SATA RTC USB 2 RGMII Step Clock 10/100/1000 Phy SATA II (host) 2x RS232 RJ45 USB 2.0 (2X) 10/100/1000 baseT G4 Frequency Synthesizer (Si5326) 114.285 MHz 24 MHz G3 Frequency Synthesizer (Si5326) 114.285 MHz 24 MHz 24 MHz 114.285 MHz Frequency Synthesizer (Si5326) G3 24 MHz 114.285 MHz Frequency Synthesizer (Si5326) = LVDS when paired, but can be run single-ended at a reduced frequency G4 10/100/1000 baseT RJ45 USB 2.0 (2X) RS232 SATA II (host) 2x 10/100/1000 Phy RGMII 2 USB EEPROM DMA(4x) SATA RTC PCIe Device Bus PCI EXPRESS Cable (GEN1) PCIe (Gen1) 4 - lanes Marvell MV78200 FPU FPU CPU CPU 4-lanes PCIe (GEN1) OSC 64 3 8 128M x 64 DDR2 128Mb SPI Boot FLASH 256Mb NAND FLASH Boot 40 40 GTX Expansion DNSEAM_NS SFP+ Socket Config Clk OSC NMB0 GTX 10Gb/s YMB NMB1 YMB SEAF JTAG RS232 PCIe (Cabled GEN1/GEN2) Config Clk OSC Virtex-6 Config FPGA PCIe NMB 1 40 150 16 150 USB 3.0 / 2.0 SATA II (device) 10GbE Ethernet FPG 0 7VX690 7V2000 [F(F/H)G1 24 MHz 114.285 MHz Frequency Synthesizer (Si5326) G0 24 MHz 0 1 114.285 MHz Frequency Synthesizer (Si5326) G1 24 MHz 114.285 MHz Frequency Synthesizer (Si5326) G2 NMB 2 C ( 1 72 72 DINAR1 Expansion Connecto 4 PCIe (GEN2) iPASS 40 8 1 72 4 72 DINAR1 Expansion Connector FPGA 1 7VX690T 7V2000T [F(F/H)G1761] 72 72 2 DINAR1 Expansion Connector 3 FPGA to FPGA Interconnect DINAR1_CABLE 2 3 4 FPGA to FPGA Interconnect DINAR1_CABLE FPGA to FPGA Interconnect DINAR1_CABLE SLAVE DINAR1 pansion Connector 2 DINAR1 Expansion Connector 0 DINAR1 Expansion Connector 1 72 GA 1 X690T 2000T )G1761] PCIe (Cabled /GEN2) Config Clk OSC II S232 ck 72 USB 72 EEPROM DMA(4x) SATA RTC GTX 10Gb/s NMB0 PCIe Device Bus YMB Virtex-6 Config FPGA PCI EXPRESS Cable (GEN1) 150 150 16 40 PCIe PCIe (Gen1) 4 - lanes 4-lanes PCIe (GEN1) NMB1 40 YMB Marvell MV78200 FPU FPU CPU CPU NMB 1 NMB 2 72 72 40 40 OSC FPGA 0 7VX690T 7V2000T [F(F/H)G1761] 64 3 8 SEAF DNNMB Connector (400 pins) 5 5 5 128M x 64 DDR2 128Mb SPI Boot FLASH 256Mb NAND FLASH Boot 72 Global Clocks 8 1 4 4 PCIe (GEN2) iPASS Stacking 2 GTX Expansion DNSEAM_NS SFP+ Socket QSFP+ SATA II 10GbE Ethernet 40 GbE or 4, 10 GbE MASTER 24 MHz 114.285 MHz Frequency Synthesizer (Si5326) G0 40 GbE or 4, 10 GbE 10GbE Ethernet 10GbE Ethernet 24 MHz JTAG SATA II USB 3.0 / 2.0 SATA II (device) 0 1 114.285 MHz Frequency Synthesizer (Si5326) QSFP+ SFP+ Socket DNSEAM_NS GTX Expansion G1 2 4 GTX Expansion DNSEAM_NS SFP+ Socket 24 MHz Config Clk PCIe (GEN2) iPASS 4 OSC 1 8 8 1 1 114.285 MHz Frequency Synthesizer (Si5326) 4 PCIe (GEN2) iPASS 4 G2 FPGA S0 7VX690T 7V2000T [F(F/H)G1761] PCIe (Cabled GEN1/GEN2) 4GB SODIMM FPGA M1 7VX690T 7V2000T [F(F/H)G1761] RS232 Config Clk OSC 16 40 SNMB1 YMB NMB0 GTX 10Gb/s NMB1 150 150 40 40 YMB NMB0 72 72 144 144 DDR 3 SNMB0 150 150 GTX 10Gb/s NMB1 Virtex-6 Config FPGA PCIe YMB 16 40 FPGA S1 7VX690T 7V2000T [F(F/H)G1761] 4GB SODIMM DDR 3 FPGA M0 7VX690T 7V2000T [F(F/H)G1761] 4 PCIe (GEN2) iPASS 4 1 1 8 8 1 OSC 4 iPASS PCIe (GEN2) Config Clk SFP+ Socket DNSEAM_NS GTX Expansion 4 2 GTX Expansion DNSEAM_NS SFP+ Socket QSFP+ SATA II (device) USB 3.0 / 2.0 SATA II 10GbE Ethernet 10GbE Ethernet 40 GbE or 4, 10 GbE SLAVE SMA SMA SMA Step Clock 24 MHz SMA 114.285 MHz Frequency Synthesizer (Si5326) G3 24 MHz SMA 114.285 MHz Frequency Synthesizer (Si5326) G4 10/100/1000 baseT RJ45 USB 2.0 (2X) RS232 10/100/1000 Phy RGMII 2 USB EEPROM PCIe OSC (Gen1) 4 - lanes Device Bus Marvell MV78200 64 FPU FPU DMA(4x) CPU CPU 3 SATA PCIe 128M x 64 DDR2 128Mb SPI Boot FLASH = LVDS when paired, but can be run single-ended at a reduced frequency Figure 2 SATA II (host) 2x RTC PCI EXPRESS Cable (GEN1) 4-lanes PCIe (GEN1) 8 256Mb NAND FLASH Boot MASTER 858 . 454 . 3419 13
Page 1 and 2: April 2013 v5.0 FPGA Boards ASIC Pr
Page 3 and 4: WHO, WHAT, WHERE, WHY? Who are you?
Page 5 and 6: HOSTING THE LARGEST FPGA EVER! USB
Page 7 and 8: four Virtex-7 FPGAs | 7V2000T-1 | 5
Page 9 and 10: two Virtex-7 FPGAs | 7V2000T-1 | 28
Page 11: single Virtex-7 FPGA | 7V2000T-1 |
Page 15 and 16: dual Altera Stratix V FPGAs | 5SGXA
Page 17 and 18: single Xilinx Kintex-7 FPGA | QDRII
Page 19 and 20: single Xilinx Kintex-7 FPGA | QDRII
Page 21 and 22: A B C D F A B C F E D F D FPGA A LE
Page 23 and 24: Alternate Memory: 200-pin SODIMM SO
Page 25 and 26: DNV6F2PCIe JTAG A DDR3 SODIMM (4GB
Page 27 and 28: DN-DualV6-PCIe-4 from FPGA A from F
Page 29 and 30: Specialty 204-pin SODIMM DNSODM204_
Page 31 and 32: DINAR1 Daughter Cards DINAR1_SOC 18
Page 33 and 34: DINAR1 Daughter Cards | DNNMB DINAR
Page 35 and 36: SMA DNMEG Daughter Cards DNMEG_SODI
Page 37 and 38: 114.285 MHZ 114.285 MHZ 114.285 MHZ
Page 39 and 40: DNIOB: High Speed Serial Interfaces
Page 41 and 42: SEAM Expansion DNSEAM_IPASSx4 Add 4
Page 43 and 44: DNK7_F5PCIe PC3-800 DDR3 (256M DDR3
Page 45 and 46: DNBFC_S12_PCIe Expansion Cards / Bo
Page 47 and 48: IP - PCIe (Gen1,2,3) Slowdown PCIe

FPGA Boards - The Dini Group

Create successful ePaper yourself

Delete template?

Save as template?