FPGA Boards - The Dini Group

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LED (x8) LEDs (X8) DINAR1 Daughter Cards DINAR1_LOOPBACK 38 38 Loopback adapter card intended for manufacturing test of the DINAR1 expansion connector DINAR1 Resistor Array 38 38 DINAR1_SODM204 Add a 204-SODIMM memory module to any DINAR1 expansion connector DINAR1 Expansion Connector 8 10 pin IDC 130 64-bit data DDR3 SODIMM (4GB Max) 204-pin module options are on page 29 - 30 Regulator DDR3 VTT +12V 1.5V Regulator 4.3A DIMM VDD DINAR1_CBL 30” Connect two cards together via a cable DINAR1 Connector DINAR1 Connector SEAM SEAM DINAR1_OBS +3.3V +12V Power LEDs Linear Reg Linear Reg Linear Reg Linear Reg Linear Reg +12V +3.3V 32 DDR3 IODELAY Calibration Clock In VCCO_0 (+1.8V) VCCO_1 (+1.8V) VCCO_2 (+1.8V) 2.5V 2.55V SMA OSC 8 200 MHz Clock Out SMA www.dinigroup.com 2 DINAR1 Expansion Connector 4 34 19 34 19 Voltage Translate MICTOR 0 MICTOR 1 8-pin IDC +3.3V User DIP Switch +1.8V +1.8V +3.3V LED VCCO_0 VCCO_1 GPIO 0 GPIO 1 40-pin 0.1” IDC Connector +1.8V 40-pin 0.1” IDC Connector +1.8V Miscellaneous useful interfaces • Adjustable I/O voltages via on-board regulators - 3 separate banks individually configurable to +1.2V to +1.8V • Status LEDs: - Power: +12V, +3.3V, +2.5V - 8 user-controlled via FPGA pin • Two Mictor connectors: 34 single-ended signals each • Two 40-pin dual row IDC headers - 19 single-ended signals - +1.8V • Two 8-pin single row headers - 8 single-ended signals - +3.3V • Differential external clocks input via SMAs • Differential external clocks output via SMAs • 4 position DIP switch - 1 position with LED • Linear regulator for setting I/O bank voltage - 1 per bank (total of 3)
DINAR1 Daughter Cards | DNNMB DINAR1_FMC-LPC Low pin count FMC card transposer DINAR1_K7_FMC-HPC COMING SOON. consult factory for details DINAR1_INTERCON Add more FPGA to FPGA Interconnect DINAR1 75 75 • Converts two, 400-pin, DINAR1 Expansion connectors into FPGA to FPGA interconnect - 75 pairs of length matched LVDS or 150 signals single-ended LVDS when paired, but can be run single-ended at a reduced frequency - LEDs indicate status for resets, power rails, and VCC voltages - VccI/O regulators DINAR1 - Topside, Dual 400-pin, connectors for DINAR1_Obs Observation Daughter card DNNMB_CONNECTOR QSE Stacking transposer for NMB connector NMB CONNECTOR NMB1 YMB NMB2 CLKS CLKS CLKS 40 40 40 5 5 5 QSE QSE QSE QSE QSE 858 . 454 . 3419 33
Page 1 and 2: April 2013 v5.0 FPGA Boards ASIC Pr
Page 3 and 4: WHO, WHAT, WHERE, WHY? Who are you?
Page 5 and 6: HOSTING THE LARGEST FPGA EVER! USB
Page 7 and 8: four Virtex-7 FPGAs | 7V2000T-1 | 5
Page 9 and 10: two Virtex-7 FPGAs | 7V2000T-1 | 28
Page 11 and 12: single Virtex-7 FPGA | 7V2000T-1 |
Page 13 and 14: SMA SMA SMA SMA SMA SMA SMA SMA SMA
Page 15 and 16: dual Altera Stratix V FPGAs | 5SGXA
Page 17 and 18: single Xilinx Kintex-7 FPGA | QDRII
Page 19 and 20: single Xilinx Kintex-7 FPGA | QDRII
Page 21 and 22: A B C D F A B C F E D F D FPGA A LE
Page 23 and 24: Alternate Memory: 200-pin SODIMM SO
Page 25 and 26: DNV6F2PCIe JTAG A DDR3 SODIMM (4GB
Page 27 and 28: DN-DualV6-PCIe-4 from FPGA A from F
Page 29 and 30: Specialty 204-pin SODIMM DNSODM204_
Page 31: DINAR1 Daughter Cards DINAR1_SOC 18
Page 35 and 36: SMA DNMEG Daughter Cards DNMEG_SODI
Page 37 and 38: 114.285 MHZ 114.285 MHZ 114.285 MHZ
Page 39 and 40: DNIOB: High Speed Serial Interfaces
Page 41 and 42: SEAM Expansion DNSEAM_IPASSx4 Add 4
Page 43 and 44: DNK7_F5PCIe PC3-800 DDR3 (256M DDR3
Page 45 and 46: DNBFC_S12_PCIe Expansion Cards / Bo
Page 47 and 48: IP - PCIe (Gen1,2,3) Slowdown PCIe

FPGA Boards - The Dini Group

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