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Design and Applications of Delay Locked Loop

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Characteristic DLL PLL<br />

Frequency<br />

multiplying<br />

No<br />

yes<br />

Architecture simple complex<br />

transfer function firs order second order<br />

stabile absolute conditional<br />

locking time short long<br />

delay range <strong>of</strong><br />

regulation<br />

limited<br />

unlimited<br />

tracking jitter small large<br />

PLL<br />

2<br />

, DLL<br />

2<br />

∆t ∆t<br />

∆t<br />

α ≅<br />

ω<br />

2ω<br />

ref<br />

2<br />

2<br />

2<br />

PLL = α ⋅ ∆t VCO<br />

PLL<br />

∆t<br />

2<br />

= N ⋅ ∆<br />

DLL t d<br />

2

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