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Design and Applications of Delay Locked Loop

Design and Applications of Delay Locked Loop

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The modification is made by<br />

adding a transistors M 5<br />

& M 6<br />

They present symmetrical<br />

load.<br />

Symmetrical load increase the current<br />

charging/discharging the output capacitance<br />

<strong>and</strong> change shape <strong>of</strong> regulation characteristic.<br />

Current is a variable <strong>and</strong> it value depends<br />

from output voltage.<br />

Symmetrical load provide negative feedback<br />

which gives linear regulation characteristic.

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