IBM 5150 PC Technical Reference (6025005, August, 1981) (PDF)

Data Record Architecture
MOTOR
ON
MOTOR
OFF
1. Leader 256 bytes (of ones)
2. Sync byte ASCII Sync Char (X'16')
3. Sync byte (X '16')
4. Data Blocks 256 bytes
5. CRC -- 2 bytes - for each data block
Error Recovery
Error recovery is handled by software. A cyclic redundancy
check (CRC) is used to detect errors. The polynomial used is:
G(X) - X16 «X12 « X5 X 1
Which is the polynomial used by the SDLC interface. Essentially,
as bits are written/read from tape, they are passed through
the CRC-register in software. After a block of data is written, the
complemented value of the calculated CRC-register is written on
tape. On reading the cassette data, the CRC bytes are read and
compared to the generated CRC value. If the read CRC does not
equal the generated one, the processor's carry flag is set and
status (AH) is set to X'Ol' to indicate a CRC error has occurred.
Also, the routine is exited on CRC error.
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