IBM 5150 PC Technical Reference (6025005, August, 1981) (PDF)

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Table 9. Functions and Conditions of DIP Switch 2 Pin No. Function ON OFF Factory-set Condition 1 Not applicable - - ON 2 - - ON 3 AUTO FEED ~ Fixed internally Fixed Not fixed OFF XT signal Not fixed internally 4 Coding table select N.A. Standard OFF Parallel Interface Description (1) Specifications (a) Data transfer rate: 1000 CPS (max.) (b) Synchronization: By externally supplied STROBE pulses. (c) Handshaking: ACKNLG or BUSY signals. (d) Logic level: Input data and all interface control signals are compatible with the TTL level. ~ (2) Connector Plug: 57-30360 (AMPHENOL) (3) Connector pin assignment and descriptions of signals. Connector pin assignment and descriptions of respective interface signals are provided in Table (10) page 2-74. 2-73
Table 10. Connector Pin Assignment and Descriptions ofInterface Signals Signal Return Pin No. Pin No. 1 19 2 20 3 21 4 22 5 23 6 24 7 25 8 26 9 27 10 28 11 29 Signal STROBE DATA 1 DATA 2 DATA 3 DATA 4 DATA 5 DATA 6 DATA 7 DATA 8 ACKNLG BUSY Direction In In In In In In In In In Out Out Description STROBE pulse to read data in. Pulse width must be more than O.5J.1S at receiving terminal. The signal level is normally "HIGH"; read·in of data is per· formed at the "LOW" level of this signal. These signals represent information of the 1st to 8th bits of parallel data respectively. Each signal is at "HIGH" level when data is logical "1" and "LOW" when logical "0". Approx .. 5J.1S pulse. "LOW" indicates that data has been received and that the printer is ready to accept other data. A "HIGH" signal indicates that the printer cannot receive data. The signal becomes "High" in the following cases: 1. During data entry 2. During printing operation 3. In OFF·LlNE state 4. During printer error status. 2-74
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April 2011 IMPORTANT 1. The motherb
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FEDERAL COMMUNICATIONS COMMISSION R
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CONTENTS SECTION 1. HARDWARE OVERV
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Programming Considerations ........
Page 12 and 13:
INS 8250 Functional Pin Description
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FIGURE LISTING 1. System Block Dia
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SECTION I. HARDWARE OVERVIEW The
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The 16KB Memory Expansion Kits allo
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SECTION 2. HARDWARE ~ Contents: Sys
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SYSTEM BOARD The System Board fits
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The memory is dynamic 16K x 1 chips
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System Board Data Flow Figure 2. S
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1/0 Channel Diagram REAR PANEl SI
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I/O CHRDY I I/O Channel Ready: This
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System Board Component Diagram REA
Page 34 and 35:
Keyboard Interface B lock Diagram
Page 36 and 37:
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
Page 38 and 39:
Cassette User Interface The cassett
Page 40 and 41:
Cassette Interface Connector Specif
Page 42 and 43: I/O Address Map HEX RANGE 9 8 7 6
Page 44 and 45: System Memory Map X'OOOOO' 16 TO 6
Page 46 and 47: System Memory Map Cont. START ADDR
Page 48 and 49: 5-1/4" Diskette Drives Switch Setti
Page 50 and 51: 32/64KB Memory Expansion Option Sw
Page 52 and 53: Power Supply The system DC power su
Page 54 and 55: N I ~ VI ) § I • \. ~ o el so.
Page 56 and 57: IBM Monochrome Display and Parallel
Page 58 and 59: System Channel Interface Lines Used
Page 60 and 61: Programming Considerations Programm
Page 62 and 63: • CRT Status Port (I/O Address '3
Page 64 and 65: Color/Graphics Monitor Adapter The
Page 66 and 67: CPU .. r-- ) ) ) DISPLAY ADDRESS BU
Page 68 and 69: Modes of Operation There are two ba
Page 70 and 71: IBM Monochrome Display Adapter V s.
Page 72 and 73: Color selection is determined by th
Page 74 and 75: 1"'"""""\ Table 5. I R G B Summary
Page 76 and 77: Programming the Mode Control and St
Page 78 and 79: Bit 5 When on, this bit will change
Page 80 and 81: I/O Address and Bit Map Read/Write
Page 82 and 83: Color/Graphics Monitor Adapter Auxi
Page 84 and 85: Parallel Printer Adapter The Printe
Page 86 and 87: Programming Considerations The Prin
Page 88 and 89: Parallel Printer Adapter Interface
Page 90 and 91: Table 7. Printer Specifications (1
Page 94 and 95: Table 10. Connector Pin Assignment
Page 96 and 97: (4) Data transfer sequence Fig. 17
Page 98 and 99: ASCII Control Codes Control Codes V
Page 100 and 101: (8) DC 2 (Device Control 2) The DC
Page 102 and 103: (b) 3) ESC 2 (Escape 2) Receipt of
Page 104 and 105: ehaves like the LF code. Therefore,
Page 106 and 107: [DATA] IESCGI ABCDEFGHI [PRINT] ABC
Page 108 and 109: 5 1/4-Inch Diskette Drive Adapter T
Page 110 and 111: ~ Functional Description From a pro
Page 112 and 113: The FOe is capable of performing 15
Page 114 and 115: Table 13. Symbol Descriptions (cont
Page 116 and 117: Command Summary (continued) DATA B
Page 118 and 119: Command Summary (continued) DATA B
Page 120 and 121: Table 15. Status Register I BIT NO.
Page 122 and 123: Table 17. Status Register 3 BIT NO.
Page 124 and 125: ~ ~ +AO-9 +AEN -lOW -lOR -DACK2 +T
Page 126 and 127: Adapter Inputs -Index -Write Protec
Page 128 and 129: 5-1/4" Diskette Drive Adapter Exter
Page 130 and 131: (3) The write-protect sensor disabl
Page 132 and 133: Memory Expansion Options Two Memory
Page 134 and 135: Switch - Configurable Start Address
Page 136 and 137: Game Control Adapter The Game Co
Page 138 and 139: I/O Channel Description A9-AO: D7-D
Page 140 and 141: ) ) ) 15 PIN MALE '0' SHELL c....t
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Asynchronous Communications Adapter
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Modes of Operation The different mo
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I TRANSMIT 'IACUIT I +5V ~ 4S-"l Tx
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INS8250 Functional Pin Description
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Data Set Ready (DSR), Pin 37: When
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Input/Output Signals Data (D7-DO) B
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Bit 3: This bit is the Parity Enabl
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Table 23. BAUD RATE AT 1.843 Mhz De
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Interrupt Identification Register T
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Interrupt Enable Register This 8-bi
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In the diagnostic mode, the receive
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Transmitter Holding Register The T
Page 166 and 167:
Page 168 and 169:
SECTION 3. ROM and SYSTEM r", USAGE
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MOV AH,l ;function is to set time o
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Vectors With Special Meanings Inter
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BIOS Memory Map STARTING ADDRESS H
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The timer is set mode 3 which means
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Keyboard Encoding and Usage Encodin
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Keys 71-83 have meaning only in bas
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ALT - Temporarily shifts keys 2-13,
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Keyboard Usage This section is inte
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Table 28. BASIC Screen Editor Speci
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Low Memory Maps (O-'0600'x) Table 3
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BASIC Workspace Variables If you do
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APPENDICES Contents: Appendix A: RO
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lOC OBJ LINE SOURCE STITlE( ROM BIO
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LOC OBJ LINE SOURCE 0068 ?! 155 De
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LOC OBJ LINE SOURCE E09E BBf5 EOAO
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lOC OBJ LINE SOURCE £179 E2FD 462
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LOC OBJ LINE SOURCE E278 7408 612 J
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lOC OBJ LINE SOURCE 755 ; ---------
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LOC OSJ LINE SOU RCE E42B 7440 900
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lOC OBJ LINE SOURCE ESIE 884000 E52
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LaC OBJ LINE SOURCE E613 803E120001
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LaC OSJ LINE SOURCE E6EC eSOAOE E6E
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LaC OBJ LINE SOURCE E7SF 1505 .402:
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LaC OBJ LINE SOURCE 1659 ASSUME CS:
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LOC OBJ LINE SOURCE E994 8E08 1798
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LOC 08J LINE SOURCE £"91 474849 EA
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LaC OBJ LINE SOURCE E890 E99700 E89
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LOC 08J LINE SOURCE 2255 ;-- INT 13
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LOC OS! LINE SOURCE 2407 ;------ DI
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lOC OBJ LINE SOURCE (Eol 7438 fE03
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LOC OBJ LINE SOURCE Ef'tD £67200 2
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LOC OBJ LINE SOURCE 2870 I ~- -----
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LOC (lBJ LINE SOURCE 3007 j --- INT
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laC OBJ LINE SOURCE 3157 (AH}=6 SCR
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lOC OBJ LINE SOURt.:E FOA43828ZDOAI
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lOC OBJ LINE SOURCE FtC7 3458 VIDEO
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LOC OBJ LINE SOURCE F260 750E f2:62
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LOC OBJ LINE SOURCE F32B 06 3760 PU
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LOC OBJ LINE SOURCE F3Cl 3910 NEAR
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laC OBJ LINE SOURCE 1'460 80HfE F46
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LOC OBJ LINE SOURCE F4FF BSFB 4213
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LOC OBJ LINE SOURCE 4359 j------ IM
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LOC OBJ LINE SOURCE F689 57 4511 PU
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lOC OBJ LINE SOLIRCE 4662 THE 0 COL
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LOC OBJ LINE SOURCE F7Cl 8AC4 F7e]
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LaC OBJ LINE SOURCE F840 4967 EQUIP
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LOC OBJ LINE SOURCE F8DA E304 5116
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LOC OBJ LINE SOURCE F97E EBF9 5268
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LOC OBJ LINE SOURCE H20 C3 5415 RET
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LOC OBJ LINE SOURCE fC46 0030300000
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LOC OBJ LINE SOURCE FEBS 833E6E0018
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lOC OBJ LINE SOURCE 5866 ;.*.-•
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A-82 NOTES
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8088 REGISTER MODEL AX: AH Al ACCUM
Page 279 and 280:
MEMORY SEGMENTATION MODEL LOGICAL
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XCHG =Exchange RegisterImemory with
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SBB = Subtract with borrow Reg./mem
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AND = And Reg./memory and register
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Indirect within segment 11111111 mo
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8088 CONDITIONAL TRANSFER OPERATION
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BOBBINSTRUCTION SET MATRIX LO HI 0
Page 293 and 294:
INSTRUCTION SET INDEX Mnemonic Pag
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VALUE AS CHARACTERS AS TEXT ATTRIBU
Page 297 and 298:
Page 299 and 300:
Page 301 and 302:
Page 303 and 304:
Page 305 and 306:
Character Set (OO-7F) Quick Referen
Page 307 and 308:
C-14 NOTES
Page 309 and 310:
SYSTEM BOARD (PROCESSOR AND SUPPORT
Page 311 and 312:
SYSTEM BOARD (DEVICE DECODES) I~ i
Page 313 and 314:
SYSTEM BOARD (ROS AND BUS DRIVER) ~
Page 315 and 316:
Ṉ-0 SYSTEM BOARD (DYNAMIC MEMORY
Page 317 and 318:
SYSTEM BOARD (KEYBOARD/SENSE/CONTRO
Page 319 and 320:
\:j I " m < -tv CI:I Q » :11:1 Q P
Page 321 and 322:
I- z ..... 0 t:::I 0 ... ;:; ~ r
Page 323 and 324:
tl I-0'1 ," r-" "~ (S"T" 'RESET I E
Page 325 and 326:
~ ~ ~ ~ ~~ IBM MONOCHROME DISPLAY A
Page 327 and 328:
tj III ~ N 14L.517') ~ 0 __________
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~ N s: N CI CO J ~ CI 2 A Y 18 n DA
Page 331 and 332:
IBM MONOCHROME OISPLAY DANGER HAZAR
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COLOR/GRAPHICS MONITOR ADAPTER ~
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1'. -- COLOR/GRAPHICS MONITOR ADAPT
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1 COLOR/GRAPHICS MONITOR ADAPTER :;
Page 341 and 342:
PARALLEL PRINTER ADAPTER D-34
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t:l +AEN AND U'I GATE , ., + ENABL
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t:! W CI CHARGE PUMP 00 AOI en U ~I
Page 347 and 348:
5%" DISKETTE DRIVE .., CI -N ... ';
Page 349 and 350:
t:j ~ N o W z N ;:1'1: ~ aZKO: ." R
Page 351 and 352:
32KB MEMORY EXPANSION d-w- I NNO) 3
Page 353 and 354:
64 ~~ MEMORY EXPANSION ~~ D-46
Page 355 and 356:
BO~ t::l azq +';V[)( +'>vOC 'f c+o;
Page 357 and 358:
D-50 NOTES
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IBM Monochrome Display Size: Length
Page 361 and 362:
12. Binary: (1) Pertaining to a sel
Page 363 and 364:
40. Hertz (Hz.): A unit offrequency
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70. OR: A logic operator having the
Page 367 and 368:
G-8 NOTES
Page 369 and 370:
Other Related Publications 7. NATIO
Page 371 and 372:
Page 373 and 374:
Character Codes 3-11 Generator 2-
Page 375 and 376:
DIN (Connectors) 2-5 DIP (Dual In-L
Page 377 and 378:
Game Control Adapter (continued) C
Page 379 and 380:
I/O (Input/Output) Address Map 2-33
Page 381 and 382:
Microsecond 2-3 Mnemonic B-18 Mod
Page 383 and 384:
Parameters, 6845 Initialization 2-4
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Read/Write Memory (continued) Grap
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s Scan Codes 2-17 Screen 2-43 Sche
Page 389 and 390:
u Unit Specifications Appendix E
Page 391 and 392:
1-22 NOTES
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III"I UNITED NO POSTAGE NECESSARY
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