IBM 5150 PC Technical Reference (6025005, August, 1981) (PDF)

MEMORY SEGMENTATION MODEL
LOGICAL
MEMO RY SPACE
t~
o
..[ ot FFFFFH
P
64KB CODE SEGMENT r"'\
}
~ XXXXOH
i=:
OFFSET
ADORESS
15 0
I DISPLACEMENT
I-
----! I
01 SP LAII'M ,NT
:~
} STACK SEGMENT
I
I
I
I
MSB
I
15 0
I I WORD {
SELECTED
LSB } DATA SEGMENT
CS 0000 r-
SEGMENT
BYTE
REGISTER SS 0000 ~
OS 0000
CS,SS, OS, ES
ES 0000
OR NONE
::
~
FOR I/O, INT ~,
.--
I
~ 7 :;­
V
I
I
I
EXTRA DATA
I } SEGMENT
I
I ADDER
I
I
I
I
L T OOOOOH
19 >­ 0
PHYSICAL
ADDRESS
LATCH
SEGMENT OVERRIDE PREFIX
IOOlregl101
USE OF SEGMENT OVERRIDE
OPERAND REGISTER DEFAULT WITH OVERRIDE PREFIX
IP (code address) CS Never
SP (stack address) SS Never
BP (stack address or stack marker) SS BP + DS or ES, or CS
SI or D 1 (not incl. strings) OS ES, SS, or CS
SI (implicit source addr for strings) OS ES, SS, or CS
01 (implicit dest addr for strings) ES Never
B-4