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IBM 5150 PC Technical Reference (6025005, August, 1981) (PDF)

IBM 5150 PC Technical Reference (6025005, August, 1981) (PDF)

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The memory is dynamic 16K x 1 chips with an access time of 250 ns<br />

and a cycle time of 410 ns. All R/W memory is parity checked.<br />

The System Board contains circuits for attaching an audio cassette,<br />

the serial keyboard, and the speaker. The cassette adapter allows the<br />

attachment ofany good quality audio cassette via either the microphone<br />

1"""""\ or auxiliary inputs. The board has a jumper for either input. This<br />

interface also provides a cassette motor control line for transport<br />

starting and stopping under program control. This interface reads and<br />

writes the audio cassette at a data rate of between 1,000 and 2,000<br />

baud. The baud rate is variable and dependent on data content since a<br />

different bit-cell time is used for O's and 1 'so For diagnostic purposes,<br />

the tape interface can loop read to write to test the board's circuits.<br />

The system software blocks cassette data, generates and checks data<br />

with a Cyclic Redundancy Check (CRC).<br />

.~<br />

The processor also contains the adapter circuits for attaching the<br />

serial interface from the keyboard. This generates an interrupt to the<br />

processor when a complete scan code is received. This interface can<br />

request execution of a diagnostic in the keyboard.<br />

Both the keyboard and cassette interfaces are provided via 5-pin<br />

DIN connectors, which are right angle mounts on the System Board<br />

and extend through the rear panel of the System Unit.<br />

The system is provided with a 2-1/4-inch audio speaker mounted inside<br />

the System Unit. The System Board contains the control circuits and<br />

driver for the speaker. The speaker connects through a 2-wire interface<br />

which attaches to a 4-pin header on the System Board.<br />

The speaker drive circuit is capable of approximately a 1/2 watt of<br />

power. The control circuits allow the speaker to be driven several<br />

different ways. First, a direct program control register bit may be<br />

toggled to generate a pulse train; second, the output ofChannel 2 ofthe<br />

timer counter may be programmed to generate a waveform to the<br />

speaker. Third, the clock input to the timer/counter can be modulated<br />

with a program controlled I/O Register Bit. All three forms of control<br />

may be performed simultaneously.<br />

2-5

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