TheTTL - Al Kossow's Bitsavers

TIBPAL T19L8. TIBPALT19R4. TIBPALT19R6. TIBPALT19R8
HIGH·PERFORMANCE LATCHED·INPUT PAL CIRCUITS
programming procedure for array fuses
Array fuses are programmed using a linear select method. Each fuse can be opened by selecting the
appropriate (one of 38) input line and then pulsing the correct (one of 64) product line. The levels for selecting
input lines and product lines are shown in Tables 1 and 2.
Step 1
Step 2
Step 3
Step 4
Step 5
Step 6
Step 7
Raise PGM ENABLE to VIHH.
Select an in~ut line by applying appropriate levels to L/R and PI pins.
Begin selection of the output line with appropriate conditions on PA pins.
Pulse INLE to VIH.
Raise Vee to VIHH.
Blow the fuse by pulsing the appropriate PO pin to VIHH as shown in Table 2 for the product line.
Return Vee to 5 volts and pulse PGM VERIFY. The PO pin selected in Step 6 will be less than
VOL if the fuse is open.
Steps 1 thru 7 may be repeated if the verification does not indicate that the fuse was successfully
programmed (blown). but no more than 4 times. Verification is possible only with the verify-protect fuse
intact.
To prevent further verification, two last fuses may be blown by raising PGM ENABLE and PGM VERIFY
to 16±O.5 volts. Vee is required to ,be at 0 during this operation.
programming waveforms
:L-VIL
tsu -t++l
+11- th
SELECTED ~I 1 \cl------- VIHH
PI. L/R. PA PINS : : 1 VIH
(SEE TABLES
1 AND 21 -.: :-tsu VIL
1-: r-tw
INLE ~------------------------------------------ VIH
PGM ENABLE )1, ~------ VIHH
VCC ----:;...,J/:
I
VIL
K -------------------------- :I~H
:tsu-i-J t-th-ll .
-----,---1---,---t---------------------- OV
I j+" tw1 -J I.
Is:~7~~:21 ~---T~xxxxxxxxx :~:
I I--l-td2 @ OL
I -1 jtw2
I.-td1~
VIH
PGM VERIFY
n
--------------------~ ~-------------------------- VIL
CD A high level during the verify interval indicates that programming has not been successful.
@ A low level during the verify interval indicates that programming has been succ~ssful.
3-118
TEXAS -I.!}
INSTRUMENTS
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