Master of Engineering Balram Sahu - Embedded Sensing ...

More documents

Recommendations

Info

2.1. Modeling for Sub-threshold operation 6Since this current was very small (in sub-microampere level), it was ignored for years,even for rather wide transistors. This sub-threshold current was measured at very lowcurrent level, and showed the unusual exponential dependency of the drain current onthe gate voltage depicted in figure 2.1. Weak inversion then came into attention of thedigital design community under the name "sub-threshold current".2.1 Modeling for Sub-threshold operationSome part of this section is takes from [4].Considering an NMOS transistor operating in sub-threshold (i.e. V GS < V T H , where V T His the transistor threshold voltage) experiences the three current contributions as shownin Figure 2.2.(a)-(c): the sub-threshold current I ST (due to diffusion of minority carriersbetween drain and source [2]), the gate current I G (due to tunneling through dielectric)and the junction leakage I G (due to BTBT current across depletion regions) [3].Figure 2.2: NMOS transistor current contribution in sub-threshold. (a) Sub-thresholdcurrent. (b) Gate current. (c) Junction leakage current.Due to the much stronger dependence on the gate voltage, I G tends to be much lowerthan I ST at low voltages, and the same holds for I J . Hence the NMOS current at ULVis dominated by the sub-threshold contribution I STwritten in the following form [2].in figure 2.2.(a), which is usuallyI ≈ I ST = I 0WL e(V GS−V T H )/n.v t(1 − e (−V DS/v t ) ) (2.1)Considering DIBL effect it can be written as follows [7]:I = β.e (V GS)/n.v t[e λ DSV DS /nv t(1 − e (−V DS/v t) )] (2.2)Wβ = I V T H00L e− n.v t
7 2.2. Challenges in Sub-threshold operationHere I 0 is the technology dependent sub-threshold current extrapolated for V GS = V T H , v t =kTqis thermal voltage, W/L is the aspect ratio and n is the sub-threshol factor (1 +C d /C OX ) [2].The model we develop uses fitting parameters that are normalized to the characteristicinverter in the technology of interest. Equation 2.3 shows the propagation delay of acharacteristic inverter with output capacitance C g in sub-threshold.t d =K.C g .V DDI 0,g .e (V GS−V T,g )/nV th(2.3)Where K is delay fitting parameter. The expression for current in the denominator of 2.3models the ON current of the characteristic inverter, so it accounts for transition throughboth NMOS and PMOS devices.unless the PMOS and NMOS devices are perfectlysymmetrical, the terms I 0,g and V T,g are fitted parameters that do not correspond exactlywith the parameters of the same name [4]. Operational Frequency can be simply statedas:1f =(2.4)t d .L DPwhere L DP is the depth of the critical path in characteristic inverter delays. DynamicEnergy (E DY N ), Leakage Energy (E LEAK ) and total energy (E T ) per cycle are expressedas 2.5-2.8 [4], assuming rail-to-rail swing.E DY N = C eff .V 2 DD (2.5)−V T,gE LEAK =n.VW eff .I 0,g .e th .t d L DP .V DD (2.6)= W eff .K.C g .L DP .V 2 DD.e −V DDn.V th (2.7)E T = E DY N + E LEAK = V 2 DD(C eff + W eff .K.C g .L DP .e −V DDn.V th ) (2.8)Equations 2.5-2.8 extend the expression for current and delay of an inverter to an arbitrarylarger sized circuits. This extension sacrifices accuracy for simplicity. Thus C eff is theaverage total switched capacitance of the entire circuit, including the average activity2.2 Challenges in Sub-threshold operationAlthough the sub-threshold circuit design opens doors of many opportunities but it hasto face challenges also. These challenges have to be taken care to design a good ultra-lowpower circuit so that it fulfills the user requirements.
Page 1: "Minimum Energy Point Operation of
Page 4 and 5: CONTENTSiv4 Flip-Flop Characterizat
Page 6 and 7: LIST OF FIGURESvi5.3 Normalized Del
Page 8 and 9: viii
Page 12 and 13: 1.4. Thesis Organization 4harvestin
Page 16 and 17: 2.2. Challenges in Sub-threshold op
Page 18 and 19: 2.2. Challenges in Sub-threshold op
Page 20 and 21: 3.2. Standard transmission gate CMO
Page 22 and 23: 3.3. Clocked Inverter CMOS Flip-flo
Page 24 and 25: 3.4. Modification in Standard Cell
Page 26 and 27: 4.1. Requirements on the library 18
Page 28 and 29: 4.3. Generation of LEF 20each metal
Page 30 and 31: 4.3. Generation of LEF 2221 PORTLAY
Page 32 and 33: 4.4. Behavioral Model 24127 RECT 3
Page 34 and 35: 4.4. Behavioral Model 26#Falling ed
Page 36 and 37: 4.4. Behavioral Model 28Figure 4.7:
Page 38 and 39: 4.4. Behavioral Model 30v a l u e s
Page 40 and 41: 4.4. Behavioral Model 32
Page 42 and 43: 5.2. Process Flow 34changes and thu
Page 44 and 45: 5.3. Results 365.3 ResultsCORDIC al
Page 46 and 47: 5.4. Comparison of results with Nor
Page 48 and 49: 5.5. The openMSP430 Micro-controlle
Page 50 and 51: 6.2. Scope for Future Work 426.2 Sc
Page 52 and 53: A.1. Input Requirements of SoC Enco
Page 54 and 55: A.2. SoC Encounter Flow 46design hi
Page 56 and 57: A.2. SoC Encounter Flow 48Do the se
Page 58 and 59: A.2. SoC Encounter Flow 50Figure A.
Page 60 and 61: A.2. SoC Encounter Flow 52
Page 62 and 63: 54The first part can be generated b
Page 64 and 65:
563. Press RUN button and wait unti
Page 66:
BIBLIOGRAPHY 58[11] FARADAY cell li
show all

Master of Engineering Balram Sahu - Embedded Sensing ...

Create successful ePaper yourself

Delete template?

Save as template?