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Master of Engineering Balram Sahu - Embedded Sensing ...

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Chapter 5Simulations and ResultsIn this work, CORDIC algorithm is implemented and demonstrated, in simulations, tobe operable over the wide voltage range <strong>of</strong> 270mV to 1.2V in all process corners. Thischapter talks about flow <strong>of</strong> work done and results obtained.Standard cell library is always designed and characterized at a particular voltage. 0.13µmFaraday standard core cell library is characterized at 1.2volts in TT corner with 25℃.Thereby we can calculate the power and delay <strong>of</strong> the ASIC synthesized through thisstandard cell library at that particular voltage. But we can not guarantee that thesame ASIC can operate at some other voltage level with different performance. Wecan only guarantee the ASIC to be operable at different voltage level meeting a specificperformance by doing exhaustive Spice simulation. Spice simulation <strong>of</strong> ASIC design is nota feasible solution because it takes several day to finish. In this work we have proposeda simpler approach to determine the same for CORDIC algorithm and also we havecalculated energy consumed per rotation for a wide operating voltage range <strong>of</strong> 270mV to1.2V. Thus we find out the minimum energy point <strong>of</strong> CORDIC design.5.1 Assumptions• It is assumed that the critical path <strong>of</strong> ASIC design does not change with voltage,process and temperature.• It is assumed that the leakage power <strong>of</strong> cell is independent <strong>of</strong> the input combination.The first assumption is a weak assumption because with PVT variation delay <strong>of</strong> each path33

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