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1. Basic Concepts in Reliability Design - nl3prc

1. Basic Concepts in Reliability Design - nl3prc

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[2] <strong>Design</strong><strong>in</strong>g for <strong>Reliability</strong>3.2.2 Noise Charge due to Impact Ionization 5)In the other failure mechanism caused by impact ionization, holes (<strong>in</strong> an N-channel device) from theelectron-hole pairs generated by previous impact ionization are accelerated towards the substrate,caus<strong>in</strong>g secondary impact ionization. These pairs reach the immediately adjacent memory cells (CCDcells), fill<strong>in</strong>g storage capacitors with electrons and <strong>in</strong>vert<strong>in</strong>g their memory states. This failuremechanism should not be neglected, as scal<strong>in</strong>g levels will become even greater <strong>in</strong> the future.3.2.3 Soft Errors 6)With <strong>in</strong>creas<strong>in</strong>g device densities, errors caused by α-particle radiation from m<strong>in</strong>ute amounts ofradioactive elements must be considered. These elements, such as uranium and thorium, are oftenconta<strong>in</strong>ed <strong>in</strong> packag<strong>in</strong>g and metal materials. Called “soft errors,” device malfunctions due to radiationcan broadly be classified <strong>in</strong>to memory cell mode errors and bit l<strong>in</strong>e mode errors.A memory cell mode error occurs when an α particle imp<strong>in</strong>ges on a DRAM cell capacitor (which is usedto store one bit of <strong>in</strong>formation). Electrons generated by the imp<strong>in</strong>g<strong>in</strong>g α particle and the resultantenergy attenuation subsequently flow <strong>in</strong>to the cell capacitor. In this mode therefore, a 1 <strong>in</strong> a cellcapacitor is <strong>in</strong>verted to 0.In a bit l<strong>in</strong>e mode error, electrons generated by α-particle radiation can affect the bit l<strong>in</strong>e <strong>in</strong>formationvoltage or the reference voltage. In the former case 1s are <strong>in</strong>verted to 0s; <strong>in</strong> the latter case 0s are<strong>in</strong>verted to 1s. With <strong>in</strong>creased cycle times, the probability of encounter<strong>in</strong>g a bit l<strong>in</strong>e signal error<strong>in</strong>creases. Bit l<strong>in</strong>e mode errors, therefore, are dependent on cycle time while memory cell mode errorsare not.In order to reduce the soft error rate, measures such as apply<strong>in</strong>g high-purity res<strong>in</strong> and coat<strong>in</strong>g thechips to protect circuits from α-particle radiation are taken. Trench cell capacitors are used to <strong>in</strong>creasethe memory cell capacitance (see Figure 3.7).Word l<strong>in</strong>eBit l<strong>in</strong>eIsolationPolysilicon plateP substrateFigure 3.7 Example of trench cell structure2-19

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