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CC110117 Received Signal Qualifiers and Link Quality InformationCC1101 has several qualifiers that can be usedto increase the likelihood that a valid syncword is detected.17.1 Sync Word QualifierIf sync word detection in RX is enabled inregister MDMCFG2 the CC1101 will not start fillingthe RX FIFO and perform the packet filteringdescribed in Section 15.3 before a valid syncword has been detected. The sync wordqualifier mode is set by MDMCFG2.SYNC_MODEand is summarized in Table 24. Carrier senseis described in Section 17.4.MDMCFG2.SYNC_MODESync Word Qualifier Mode000 No preamble/sync001 15/16 sync word bits detected010 16/16 sync word bits detected011 30/32 sync word bits detected100 No preamble/sync, carrier senseabove threshold101 15/16 + carrier sense above threshold110 16/16 + carrier sense above threshold111 30/32 + carrier sense above thresholdTable 24: Sync Word Qualifier Mode17.2 Preamble Quality Threshold (PQT)The Preamble Quality Threshold (PQT) syncwordqualifier adds the requirement that thereceived sync word must be preceded with apreamble with a quality above theprogrammed threshold.Another use of the preamble quality thresholdis as a qualifier for the optional RX terminationtimer. See Section 19.7 on page 46 for details.The preamble quality estimator increases aninternal counter by one each time a bit isreceived that is different from the previous bit,and decreases the counter by 8 each time abit is received that is the same as the last bit.The threshold is configured with the registerfield PKTCTRL1.PQT. A threshold of 4·PQT forthis counter is used to gate sync worddetection. By setting the value to zero, thepreamble quality qualifier of the synch word isdisabled.A “Preamble Quality Reached” signal can beobserved on one of the GDO pins by settingIOCFGx.GDOx_CFG=8. It is also possible todetermine if preamble quality is reached bychecking the PQT_REACHED bit in thePKTSTATUS register. This signal / bit assertswhen the received signal exceeds the PQT.17.3 RSSIThe RSSI value is an estimate of the signalpower level in the chosen channel. This valueis based on the current gain setting in the RXchain and the measured signal level in thechannel.In RX mode, the RSSI value can be readcontinuously from the RSSI status register untilthe demodulator detects a sync word (whensync word detection is enabled). At that pointthe RSSI readout value is frozen until the nexttime the chip enters the RX state. The RSSIvalue is in dBm with ½dB resolution. The RSSIupdate rate, f RSSI , depends on the receiverfilter bandwidth (BW channel defined in Section13) and AGCCTRL0.FILTER_LENGTH.fRSSI2 ⋅ BW=8⋅2channelFILTER _ LENGTHIf PKTCTRL1.APPEND_STATUS is enabled thelast RSSI value of the packet is automaticallyadded to the first byte appended after thepayload.The RSSI value read from the RSSI statusregister is a 2’s complement number. Thefollowing procedure can be used to convert theRSSI reading to an absolute power level(RSSI_dBm).1) Read the RSSI status register2) Convert the reading from a hexadecimalnumber to a decimal number (RSSI_dec)3) If RSSI_dec ≥ 128 then RSSI_dBm =(RSSI_dec - 256)/2 – RSSI_offset4) Else if RSSI_dec < 128 then RSSI_dBm =(RSSI_dec)/2 – RSSI_offsetTable 25 gives typical values for theRSSI_offset.Figure 13 and Figure 14 shows typical plots ofRSSI reading as a function of input powerlevel for different data rates.SWRS061C Page 37 of 94