Sequential Circuits Prophet-5 Service Manual - Audiofanzine

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2-15 CASSETTE INTERFACEThe cassette interface hardware issimple (see schematic SD332). For storing on tape, bits are seriallylatchedout through MISC output port -CSOL4, U332-7, filtered by R324/C351, and ac-coupled to therecorder input by C352. For loading from tape, the pulses are ac-coupled by C361 and squared-up bythe CASS CPR which, as a zero-crossing detector, isinsensitive to phase or polarity variations betweenrecorders. R343 and R344 form a divider parallel with divider R342, R430, R337, and R341, each having athreshold of about 0.9V. D305 clamps the pulses to not exceed -0.6V. Read bits are input through MISCinput port -CSI1. Since allowance must also be made for speed variation, a technique of counting edgesrather than identifying logic states must be used.Organized as 40 24-byte programs, NV RAM contains 960 bytes. The least-significant seven bits of eachbyte represents a pot setting of - 127 steps, while the MSB represents a switch setting (1 = on, O=off).(When selecting a program in PRESET mode, a set of twenty-four bytes is transferred to the Scratchpad,with the pot bits filling the pot table and the switch bits being regrouped into the switch status table.)Interface timing is based on a unit called a minim, which is equivalent ot 232.4 us. Each bit is transmittedor received over a 12-minim period (2.8 ms), with a few microsecond space between them. To write, theinterface simulates frequency-shift keying (FSK) by toggling the output latch every minim to indicate a 1,and every fourth minim to indicate a 0. These rates correspond to approximately 2151 Hz (1/234 us x 1/2)and 538 Hz (2151 Hz/4). When reading from tape the interface counts the edges received and loads a 1or into NV RAM depending on whether the number of edges is greater or less than seven. Theabsolute number of edges need not be detected in any specific period, thus providing range toaccommodate wow and flutter in the cassette deck.2-21/2-22
SECTION 3DOCUMENTS3-0 DOCUMENT LISTSHEETDOC No.TITLEPAGEABCDEFGHBD031PP1315D131PP2315D231SD232PP331SD331SD332SD333SD334SD430PP4311 SD431JSD432KSD433LSD434SD435MNPP53TSD531INTERCONNECTION 3-3PCB 1 PARTS ID 3-4PCB 1 CONTROLS 3-5/3-6PCB 2 PARTS ID 3-7PCB 2 POT MUX 3-8PCB 2 CONTROL MATRICES 3-9PCB 3 PARTS ID 3-10PCB 3 CPU, MEMORY, I/O INTERFACE 3-11PCB 3 DAC, ADC, TUNE, SEQ, CASSETTE 3-12PCB 3 CV DMUX, LATCHES 3-13PCB 3 W-MOD, MASTER SUMMERS 3-14PCB 4 CV DMUX, TUNE MUX, AUD OUT 3-15PCB 4 PARTS ID 3-16PCB 4 VOICE 1 3-17PCB 4 VOICE 2 3-18PCB 4 VOICE 3 3-19PCB 4 VOICE 4 3-20PCB 4 VOICE 5 3-21PCB 5 PARTS ID 3-22PCB 5 POWER SUPPLY 3-23/3-243-1 DOCUMENT NOTESThese notes explain component designation and the use of symbols on our documentation. For glossaryof abbreviations, see Section 6.Component designators include three items of information:R4122COMPONENT CLASSPCB NUMBERCOMPONENT NUMBERCOMPONENT CLASS issymbolized by standard letters, for example, U for integrated circuit, RT fortemperature-sensitive resistor, and DS for indicator.3-1
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Page 5 and 6: iJTable of ContentsISECTION 1MECHAN
Page 7 and 8: '1SECTION 1MECHANICAL1-0 GENERALThi
Page 9 and 10: Raise the top panel assembly to ser
Page 11 and 12: 1-5 PCB 1/2 CONTROL PANELSOnce PCB
Page 13 and 14: Figure 1-5KEYBOARD REMOVAL1 -7/1 -8
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Page 25 and 26: .'2-10 MICROPROCESSOR, MEMORY, AND
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Page 62 and 63: 4-S FILTER TEST.STEP'MODULE CONTROL
Page 64 and 65: 4-8 POLY-MOD TEST—A.STEP MODULE C
Page 66 and 67: i4-11 PITCH WHEEL TRIMThis trim rem
Page 68 and 69: A)I4-16 VCO SCALE TRIMBE SURE RECOR
Page 70 and 71: 4-19 FILTER ENVELOPE AMOUNT VCA BAL
Page 72 and 73: 4-21 FINAL VGA BAL1. Switch PRESET
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SECTION 13PROPHET-5 REV 3.3 UPDATET
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