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Sequential Circuits Prophet-5 Service Manual - Audiofanzine

Sequential Circuits Prophet-5 Service Manual - Audiofanzine

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11 IJSECTION 8THEORY8-0 INTRODUCTIONThis is the first section of supplementary material appended to the Rev 3.0 Technical<strong>Manual</strong> which covers the series referred to as Rev 3.1 and 3.2.The updates and expansion ofthe microcomputer's memory configuration which becameRev 3.1 are transparent, so, of no interest to the player. But once the PolyphonicSequencer for the <strong>Prophet</strong>- 10 was designed, we couldn't resist developing one for the<strong>Prophet</strong>-5. Thus, shortly after Rev 3.1 went into production, we again redesigned the<strong>Prophet</strong>-5 computer (and a few other circuits) to allow itto interface with the Model1005 Polyphonic Sequencer and Model 1001 Remote Keyboard/Controller. Therefore ifthey desire to use these products, owners of Rev 3.0 and 3.1their instruments upgraded to Rev 3.2.<strong>Prophet</strong>s will need to haveRev 3.0 started with serial number 1300. Specific tables of 3.1 and 3.2 serial numbersand software versions are in Section 11. Iflook at the silk-screening on PCB 3.you are in doubt about a <strong>Prophet</strong>'s Rev, justBoth revisions 3.0 and 3.2 have the numbers silkscreenedat the center top edge of the board. (Note that revision 3.0 is simply calledrevision 3.) Revision 3.1 has the number screened at the top left corner of the board.8-1 REVISION 3.1 COMPUTER and POWER SUPPLYPlease refer to SD3^i in Section 10. Revision 3.1incorporates changes to the computeroperating system PROM and the Non-Volatile program RAM, For PROM, U312/13 27162-K units were put in place of the three 2708 1-K units in Rev 3.0. This allowed the useof a higher-reliability part, elimination of the +12V and -5V power supplies, and createdprogram space for the diagnostic memory test. (The tests are covered in Section 11.)To use the higher-density 2716s, the CPU address lines to U318 Me^mory AddressDecoder are shifted up to A12-AH. All was provided for later updating this board witha 2732 ^-K. As shown, it is normally disconnected from the CPU. Instead, the All linesto U312-U31^ sockets are tied high. (On the 2716, pin 21 is for the Vpp programmingpulse.)The eight 6508 (IK x 1) NV RAM was changed to U383/8^, two ^33^ or 65U (IK x ^).These parts have a higher reliability than the parts previously used. To achieve thecorrect timing, the 3.1 (and 3.2) -NV WRITE signal is generated very differently fromthe way it is in Rev 3.0. NAND-Gate U382-8 is wired as an inverter. Thus when U311-19CPU -MREQ goes low, and A15 goes high, U382-11 goes low. U382-6, also an inverter,goes high, raising U320-13. If S3 RECORD is set to ENABLE, U320-12 will also be high,causing U320-11 to go low, enabling the NV RAM -WR inputs.The Power Distribution area of the schematic shows the spare pins (2 and 3) on P302created by removing the +12V and -5V lines from PCB 3.The back-panel cable wires tothese pins may or may not exist in a specific 3,1 unit. But on all 3.1 units, theregulators and associated components were removed from PCB 5. (See SD5^1.)TM1000D.2 10/81 8-1

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