XPLA Designer v2.1 User's Manual

5ProgrammableANDArray55...Figure 6Simplistic Timing ModelFigure 7 shows the CoolRunner Timing Model. As one can see from this illustration, theCoolRunner timing model looks very much like a 22V10 timing model in that there arethree main timing parameters including Tpd, Tsu, and Tco. In other competingarchitectures, the user may be able to fit the design into the CPLD but is not sure whethersystem timing requirements can be met until after the design has been fit into the device.This is because the timing models of competing architectures are very complex and includesuch things as: timing dependencies on the number of parallel expanders borrowed,sharable expanders, varying number of X and Y routing channels used, etc. In theXPLA TM architecture, the user knows up front whether the design will meet system timingrequirements. This is due to the simplicity of the timing model. For example, in thePZ5032 device, the user knows up front that if a given output uses 5 product terms orless, the Tpd = 6ns, the Tsu = 4ns, and the Tco = 5.5ns. If an output is using 6 to 37product terms, an additional 2ns is added to the Tpd and Tsu timing parameters toaccount for the time to propagate through the PLA array - this is the only variation intiming that exists when using the XPLA architecture!19