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iAPX 286 Operating System Writers Guide 1983

iAPX 286 Operating System Writers Guide 1983

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CHAPTER 7HANDLING EXCEPTION CONDITIONSWhen the processor recognizes a condition that it cannot handle, an exception condition, operatingsystem or applications software must temporarily take control and dispose of the condition. Exceptionconditions are also known as "faults."FAULT MECHANISMThe processor reports an exception condition by causing one of a predefined set of interrupts; oneinterrupt vector is associated with each exception condition that the processor recognizes. As with anyinterrupt, either a procedure or a task can field a fault. Faults resemble other interrupts, but theydiffer in two significant ways:• You cannot disable a fault.• For certain faults, the processor pushes an error code onto the stack of the fault handler (whetherprocedure or task) to help with recovery.FAULT RECOVERYWhen a fault occurs, the fault handler has three possible ways of dealing with the exception:oooIgnore it and continue execution of the task.Fix the problem and retry the faulting instruction.Kill the faulting task.Ignoring an exception is not generally advisable. Killing a task is sometimes unavoidable, but, forcritical tasks, the handler should make every effort to recover from the exception. In many cases, the<strong>iAPX</strong> <strong>286</strong> helps the exception handler identify the faulting instruction and the conditions that causedthe fault.Locating the Faulting InstructionUsually, a fault handler can locate the faulting instruction either via the return pointer on the stack (ifthe exception handler is an interrupt procedure) or via the IP stored in the TSS of the faulting task (ifthe exception handler is an interrupt task). This stored value of the IP is used to return control to theinterrupted task, but the exception handler can also use the stored IP value to examine the faultinginstruction. There are three cases to consider:• The stored IP value points to the location of the faulting instruction (including all prefixes). This isthe normal case.ooThe stored IP value points to the location of the next instruction.The stored IP value is unrelated to the fault. This occurs, for example, with 80287 instructions(which execute in parallel with 80<strong>286</strong> instructions), or when the 80<strong>286</strong> processor discovers a faultwhile attempting to handle an external interrupt.'7-1 121960-001

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