iAPX 286 Operating System Writers Guide 1983

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INPUT/OUTPUTRequirements for Parallelism and SynchronizationThe requirements for· parallelism and synchronization in the I/O subsystem may include any of thefollowing: .• The application procedure that requests a READ operation may run in parallel with the I/O subsystemuntil that procedure needs to reference the requested data, at which point it must wait untilthe data arrives or an exception occurs.• . The procedure that requests a WRITE operation can usually run in parallel with the I/O'subsystem.Some applications require acknowlegement of the completion ofa WRITE operation (in order,for example, to synchronize with a database recovery system), in which case that procedure mustwait until the acknowledgement arrives.• SEEK operations normally run in parallel with the requesting procedure.• The I/O dev'icecan always run iii parallel with some task in a multitasking system, whether it bethe task that requested the I/O operation or some other task that is not waiting for I/O.• In a simple I/O subsystem in which a device driver onlym~nages one I/O operation at a time, thedriver can simply wait until the device signals that the operation finishes. If the requesting procedureis blocked, the device driver can merely convert the I/O-complete signal into a wake-up signalfor that procedure. . . . .• In a more sophisticated I/O 'subsystem (for example, one in which a disk driver handles more thanone spindle and more than one task can share a disk device), greatest efficiency results only whendevice drivers run in parallel with I/O devices as well as with requesting procedures. An 1/0-complete signal from a device may arrive when the device driver is busy.Figure 8-1 explains the symbols used in a Petri net graph. Figures 8-2 and 8-3 use Petri net graphs toillustrate two approaches to synchronization between parts of an I/O subsystem. A horizontal linerepresents an event of interest that occurs only under certain conditions. Circles preceding an eventrepresent the conditions under which the event can occur. Circles after an event' represent the conditionsthat result from occurrence of the event. A dot inside a circle is called a token. A token represents!1condition that is in effe
INPUT /OUTPUT• Only the operating system and the I/O subsystem should use queues of buffers and I/O requests.• An application procedure must not use a buffer that an I/O device is simultaneously using.Implementation AlternativesIf descriptors for data global to the I/O subsystem (such as device allocation tables) reside in the GDTwith DPL equal to the I/O privilege level, then I/O procedures can access them regardless of whato FALSE CONDITIONo TRUE CONDITIONEVENTCONDITIONAL EVENTSENABLED CONDITIONAL EVENTSttOCCURRENCES OF EVENTSFigure 8-1. Petri Net Graph Symbols121960-398-5 121960-001
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LITERATUREIn addition to the produc
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Intel Corporation makes no warranty
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PREFACEExternal LiteratureMany aspe
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Table of ContentsCHAPTER 1PageINTRO
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TABLE OF CONTENTSCHAPTER 9PageVIRTU
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TABLE OF CONTENTSLIST OF FIGURESFig
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Introduction to Protected 1Multitas
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INTRODUCTION TO PROTECTED MULTITASK
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inter INTRODUCTION TO PROTECTED MUL
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111'eI INTRODUCTION TO PROTECTED MU
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Using Hardware2Protection Features
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USING HARDWARE PROTECTION,FEATURESs
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interUSING HARDWARE PROTECTION FEAT
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USING HARDWARE PROTECTION FEATURES(
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USING HARDWARE PROTECTION FEATURES
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USING HARDWARE PROTECTION FEATUREST
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USING HARDWARE PROTECTION FEATURESo
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USING HARDWARE PROTECTION FEATURESL
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USING HARDWARE PROTECTION FEATUREST
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USING HARDWARE PROTECTION FEATURESE
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inl:el~USING HARDWARE PROTECTION FE
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IntelUSING HARDWARE PROTECTION FEAT
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IntelU~ING HARDWARE PROTECTION FEAT
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lSLDTFORMATRt;;SERV~~"O~iA~~.~ijij
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CHAPTER 3REAL MEMORY MANAGEMENTIn d
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REAL MEMORY MANAGEMENTIALLOCATEGATE
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interREAL MEMORY MANAGEMENTBEFOREAF
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REAL MEMORY MANAGEMENTGLOBAL DESCRI
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REAL MEMORY MANAGEMENTTable 3-1. Ac
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REAL MEMORY MANAGEMENTBEFOREI "FREE
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REAL MEMORY MANAGEMENTBEFOREI "FREE
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REAL MEMORY MANAGEMENTPL/M-286 COMP
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IIIIIIIIIIIIIIIIIIIIII
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II I telTASK MANAGEMENTCPUTASK REGI
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TASK MANAGEMENTIf the proc~sser, wh
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TASK MANAGEMENTUsually, termination
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TASK MANAGEMENTTASK XTSS TSS TSS TS
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TASK MANAGEMENTSCHEDULING POLICIEST
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TASK MANAGEMENTThe example in figur
Page 96 and 97: TASK MANAGEMENTREADY QUEUESBY PRIOR
Page 98 and 99: IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII
Page 101 and 102: CHAPTER 5DATA SHARING, ALIASING, AN
Page 103 and 104: DATA SHARING, ALIASING, AND SYNCHRO
Page 105 and 106: interDATA SHARING, ALIASING, AND SV
Page 117: DATA SHARING, ALIASING, AND SYNCHRO
Page 121 and 122: CHAPTER 6SIGNALS AND INTERRUPTSInte
Page 123 and 124: interSIGNALS AND INTERRUPTSlOTGOTTS
Page 125 and 126: SIGNALS AND INTERRUPTSTable 6-1. In
Page 127 and 128: SIGNALS AND INTERRUPTSSend interrup
Page 129 and 130: SIGNALS AND INTERRUPTSprocedure suc
Page 131: Handling Exception Conditions 7
Page 134 and 135: HANDLING EXCEPTION CONDITIONSError
Page 136 and 137: HANDLING EXCEPTION CONDITIONSAn exc
Page 138 and 139: HANDLING EXCEPTION CONDITIONSA few
Page 140 and 141: HANDLING EXCEPTION CONDITIONSAn ins
Page 143 and 144: CHAPTER 8INPUT /OUTPUTMany of the c
Page 145: INPUT /OUTPUTYou can still take adv
Page 149: INPUT /OUTPUTtask the I/0 procedure
Page 153 and 154: CHAPTER 9VIRTUAL MEMORYThe memory l
Page 155 and 156: VIRTUAL MEMORYthose segments that a
Page 157 and 158: VIRTUAL MEMORY• Return the RAM sp
Page 159 and 160: VIRTUAL MEMORYReplacementThe operat
Page 161 and 162: System Initialization10
Page 163 and 164: CHAPTER 10SYSTEM INITIALIZATIONThe
Page 165 and 166: SYSTEM INITIALIZATIONStarting the f
Page 167 and 168: iAPX286 "ACRO ASSEMBLERLOCOBJEnter
Page 169 and 170: iAPX286 MACRO ASSEMBLEtEnter Protec
Page 171 and 172: iAPX286 MACRO ASSEMBLER·· Enter ~
Page 173 and 174: iAPX286 'UCRO USE148LER Ente,. P,.o
Page 175 and 176: iAPX286 MACRO ASSEMBLEREnt9~ P~otec
Page 177: iAPX286 MACRO ASSEMBLE~ INITIAL TAS
Page 181 and 182: CHAPTER 11BINDING AND LOADINGBindin
Page 183 and 184: BINDING AND LOADINGNamingThe names
Page 185 and 186: BINDING AND LOADING$ COMPACT (NUCLE
Page 187 and 188: interBINDING AND LOADINGsystem-IDiA
Page 189 and 190: BIND.ING AND LOADINGConverting a Pr
Page 191 and 192: BINDING AND LOADINGThe OMF of each
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Page 195 and 196: BINDING AND LOADINGPL/M-2B6 COMPILE
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BINDING AND LOADI.NGPL/M-286 COMPIL
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BINDING AND LOADINGPL/M-286 COMPILE
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BINDING AND LOADINGPL/M-2B6 COMPILE
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BINDING AND LOAD.INGPL/M-286 COMPIL
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interBINDING AND LOADINGPL/M-286 CO
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BINDING AND LOADINGPL/M-286 COMPILE
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Numerics Processor Extension 12
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NUMERICS PROCESSOR EXTENSIONMath Pr
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interNUMERICS PROCESSOR EXTENSION
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Extended Protection13
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EXTENDED PROTECTIONIndirect NamingT
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EXTENDED PROTECTIONanother procedur
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Glossary
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GLOSSARYbootloadable module: a modu
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GLOSSARYexception: a processor-dete
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GLOSSARYintersegment reference: a r
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GLOSSARYoutward call: the attempt t
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GLOSSARYscheduling state: one of se
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GLOSSARYvirtual address: an address
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INDEXES register, 2-17, 2-18, 2-21,
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INDEXpresent bit, 2-2, 2-3, 2-9, 5-
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interu.s. SALES OFFICESALAIWIA IlEQ
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interu.s. DISTRIBUTORSNEW YORK (C"n
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intJINTEL INTERNATIONAL SALES OFFIC
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iAPX 286 Operating System Writers Guide 1983

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