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LITERATUREIn addition to the produc
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Intel Corporation makes no warranty
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PREFACEExternal LiteratureMany aspe
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Table of ContentsCHAPTER 1PageINTRO
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TABLE OF CONTENTSCHAPTER 9PageVIRTU
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TABLE OF CONTENTSLIST OF FIGURESFig
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Introduction to Protected 1Multitas
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INTRODUCTION TO PROTECTED MULTITASK
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inter INTRODUCTION TO PROTECTED MUL
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111'eI INTRODUCTION TO PROTECTED MU
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INTRODUCTION TO PROTECTED MULTITASK
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INTRODUCTION TO PROTECTED MULTITASK
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Using Hardware2Protection Features
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USING HARDWARE PROTECTION,FEATURESs
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interUSING HARDWARE PROTECTION FEAT
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USING HARDWARE PROTECTION FEATURES(
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USING HARDWARE PROTECTION FEATURES
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USING HARDWARE PROTECTION FEATUREST
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USING HARDWARE PROTECTION FEATURESo
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USING HARDWARE PROTECTION FEATURESL
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USING HARDWARE PROTECTION FEATUREST
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USING HARDWARE PROTECTION FEATURESE
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inl:el~USING HARDWARE PROTECTION FE
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IntelUSING HARDWARE PROTECTION FEAT
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IntelU~ING HARDWARE PROTECTION FEAT
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lSLDTFORMATRt;;SERV~~"O~iA~~.~ijij
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CHAPTER 3REAL MEMORY MANAGEMENTIn d
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REAL MEMORY MANAGEMENTIALLOCATEGATE
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interREAL MEMORY MANAGEMENTBEFOREAF
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REAL MEMORY MANAGEMENTGLOBAL DESCRI
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REAL MEMORY MANAGEMENTTable 3-1. Ac
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REAL MEMORY MANAGEMENTBEFOREI "FREE
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REAL MEMORY MANAGEMENTBEFOREI "FREE
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REAL MEMORY MANAGEMENTPL/M-286 COMP
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REAL MEMORY MANAGEMENTPL/M-286 COMP
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REAL MEMORY MANAGEMENTPL/M-286 COMP
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REAL MEMORY MANAGEMENTPL/M-286 COMP
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IIIIIIIIIIIIIIIIIIIIII
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II I telTASK MANAGEMENTCPUTASK REGI
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TASK MANAGEMENTIf the proc~sser, wh
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TASK MANAGEMENTUsually, termination
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TASK MANAGEMENTTASK XTSS TSS TSS TS
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TASK MANAGEMENTSCHEDULING POLICIEST
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TASK MANAGEMENTThe example in figur
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TASK MANAGEMENTREADY QUEUESBY PRIOR
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IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII
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- Page 103 and 104: DATA SHARING, ALIASING, AND SYNCHRO
- Page 105 and 106: interDATA SHARING, ALIASING, AND SV
- Page 107 and 108: DATA SHARING, ALIASING, AND SYNCHRO
- Page 109 and 110: DATA SHARING, ALIASING, AND SYNCHRO
- Page 111 and 112: DATA SHARING, ALIASING, AND SYNCHRO
- Page 113 and 114: DATA SHARING, ALIASING, AND SYNCHRO
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- Page 117: DATA SHARING, ALIASING, AND SYNCHRO
- Page 121 and 122: CHAPTER 6SIGNALS AND INTERRUPTSInte
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- Page 125 and 126: SIGNALS AND INTERRUPTSTable 6-1. In
- Page 127 and 128: SIGNALS AND INTERRUPTSSend interrup
- Page 129 and 130: SIGNALS AND INTERRUPTSprocedure suc
- Page 131: Handling Exception Conditions 7
- Page 134 and 135: HANDLING EXCEPTION CONDITIONSError
- Page 136 and 137: HANDLING EXCEPTION CONDITIONSAn exc
- Page 138 and 139: HANDLING EXCEPTION CONDITIONSA few
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- Page 143 and 144: CHAPTER 8INPUT /OUTPUTMany of the c
- Page 145 and 146: INPUT /OUTPUTYou can still take adv
- Page 147 and 148: INPUT /OUTPUT• Only the operating
- Page 149: INPUT /OUTPUTtask the I/0 procedure
- Page 154 and 155: VIRTUAL MEMORYmay attach other mean
- Page 156 and 157: VIRTUAL MEMORY• TSSs that point t
- Page 158 and 159: VIRTUAL MEMORYSOFTWARE POLICIESA vi
- Page 160 and 161: VIRTUAL MEMORYat once. It then beco
- Page 162 and 163: IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII
- Page 164 and 165: SYSTEM INITIALIZATIONINITIALIZING F
- Page 166 and 167: iAPX286 MACRO ASSEMBLER Enter Prote
- Page 168 and 169: iAPX286MAeRJ~ASSE~BlfKLoeOBJ~nter P
- Page 170 and 171: iAPX286 "'ACRO AssiMBLEREni.or Prot
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- Page 174 and 175: iAPX2~6 MACRO ASSEMBLEREnter Protec
- Page 176 and 177: iAPX286 MACR~ ASSEMBLER D:FIN= SEGM
- Page 179: Binding and Loading11
- Page 182 and 183: BINDING AND LOADINGModules are rele
- Page 184 and 185: BINDING AND LOADINGThe model behind
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- Page 188 and 189: BINDING AND LOADING4748495051525354
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- Page 194 and 195: BINDING AND LOADINGBINDINGLOADERTAS
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BINDING AND LOADINGPL/M-286 COMPILE
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interBINDING AND LOADINGPL/M-286 CO
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BINDING AND LOADINGPL/M-286 COMPILE
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BINDING AND LOADINGPL/M-286 COMPILE
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BINDING AND LOADINGPL/M-286 COMPILE
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CHAPTER 12NUMERICS PROCESSOR EXTENS
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NUMERICS PROCESSOR EXTENSIONTable 1
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NUMERICS PROCESSOR EXTENSIONThe off
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CHAPTER 13EXTENDED PROTECTIONEven t
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EXTENDED PROTECTIONARPL adjusts the
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EXTENDED PROTECTIONSEND PRIVILEGE L
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GLOSSARY8254 Programmable Interval
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GLOSSARYCS (code segment) register:
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GLOSSARYhandler table: a table of s
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GLOSSARYmachine status word (MSW):
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GLOSSARYprivileged instruction: an
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GLOSSARYtask: a single thread of ex
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INDEX8089 I/O processor, 8-18254 Pr
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INDEX"invalid TSS" exception, 7-5 t
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INDEXsubsystem, 11-4swapping, 5-12,
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interALABAMAtA.rrow ElectroniCs, In
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intJINTEL EUROPEAN SALES OFFICESBEL
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intJU.S. SERVICE OFFICESCALIFORNIAI