PHYSIOLOGICAL-READOUT
ISSCC2017AdvanceProgram
ISSCC2017AdvanceProgram
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SESSION 20<br />
Wednesday February 8 th , 8:30 AM<br />
Digital Voltage Regulators and Low-Power Techniques<br />
Session Chair: Atsuki Inoue, Fujitsu Laboratories, Kawasaki, Japan<br />
Associate Chair: Dennis Sylvester, University of Michigan, Ann Arbor, MI<br />
8:30 AM<br />
20.1 A Digitally Controlled Fully Integrated Voltage Regulator with On-Die<br />
DS2 Solenoid Inductor with Planar Magnetic Core in 14nm Tri-Gate CMOS<br />
H. K. Krishnamurthy, V. Vaidya, S. Weng, K. Ravichandran, P. Kumar, S. Kim,<br />
R. Jain, G. Matthew, J. Tschanz, V. De<br />
Intel, Hillsboro, OR<br />
9:00 AM<br />
20.2 Digital Low-Dropout Regulator with Anti PVT-Variation Technique for<br />
Dynamic Voltage Scaling and Adaptive Voltage Scaling Multicore<br />
Processor<br />
W-J. Tsou 1 , W-H. Yang 1 , J-H. Lin 1 , H. Chen 1 , K-H. Chen 1 , C-L. Wey 1 , Y-H. Lin 2 ,<br />
S-R. Lin 2 , T-Y. Tsai 2<br />
1<br />
National Chiao Tung University, Hsinchu, Taiwan<br />
2<br />
Realtek Semiconductor, Hsinchu, Taiwan<br />
9:30 AM<br />
20.3 A 100nA-to-2mA Successive-Approximation Digital LDO with PD<br />
Compensation and Sub-LSB Duty Control Achieving a 15.1ns Response<br />
Time at 0.5V<br />
L. G. Salem, J. Warchall, P. P. Mercier, University of California, San Diego, CA<br />
Break 10:00 AM<br />
10:15 AM<br />
20.4 An Output-Capacitor-Free Analog-Assisted Digital Low-Dropout<br />
Regulator with Tri-Loop Control<br />
M. Huang 1,2 , Y. Lu 1 , S-P. U 1,3 , R. P. Martins 1,4<br />
1<br />
University of Macau, Macau, China<br />
2<br />
South China University of Technology, Guangzhou, China<br />
3<br />
Synopsys Macau Ltd, Macau, China<br />
4<br />
Instituto Superior Tecnico, Universidade de Lisboa, Portugal<br />
10:45 AM<br />
20.5 A Dual-Symmetrical-Output Switched-Capacitor Converter with Dynamic<br />
Power Cells and Minimized Cross Regulation for Application Processors<br />
in 28nm CMOS<br />
J. Jiang 1,2 , Y. Lu 1 , W-H. Ki 2 , S-P. U 1,3 , R. P. Martins 1,4<br />
1<br />
University of Macau, Macau, China<br />
2<br />
Hong Kong University of Science and Technology, Hong Kong, China<br />
3<br />
Synopsys Macau Ltd, Macau, China<br />
4<br />
Instituto Superior Tecnico, Universidade de Lisboa, Portugal<br />
11:15 AM<br />
20.6 A 0.5V-V IN 1.44mA-Class Event-Driven Digital LDO with a Fully<br />
Integrated 100pF Output Capacitor<br />
D. Kim 1 , J. Kim 2 , H. Ham 2 , M. Seok 1<br />
1<br />
Columbia University, New York, NY; 2 SK hynix, Icheon, Korea<br />
11:30 AM<br />
20.7 A 13.8µW Binaural Dual-Microphone Digital ANSI S1.11 Filter Bank for<br />
Hearing Aids with Zero-Short-Circuit-Current Logic in 65nm CMOS<br />
H-S. Wu, Z. Zhang, M. C. Papaefthymiou, University of Michigan, Ann Arbor, MI<br />
Conclusion 11:45 AM<br />
38