PHYSIOLOGICAL-READOUT

SESSION 26
Wednesday February 8 th , 3:15 PM
Processor-Power Management and Clocking
Session Chair: Kathy Wilcox, AMD, Boxborough, MA
Associate Chair: Youngmin Shin, Samsung, Hwaseong, Korea
3:15 PM
26.1 Design Optimization of Computing Systems from the Nanoscale
Transistor to the Datacentre
A. Nalamalpu
Intel, Hillsboro, OR
3:45 PM
26.2 Power Supply Noise in a 22nm z13 TM Microprocessor
DS2 P. I-J. Chuang 1 , C. Vezyrtzis 1 , D. Pathak 2 , R. Rizzolo 3 , T. Webel 4 , T. Strach 4 ,
O. Torreiter 4 , P. Lobo 5 , A. Buyuktosunoglu 1 , R. Bertran 1 , M. Floyd 6 , M. Ware 6 ,
G. Salem 7 , S. Carey 8 , P. Restle 1
1
IBM Research, Yorktown Heights, NY
2
Drexel University, Philadelphia, PA
3
IBM, Poughkeepsie, NY
4
IBM STG, Boeblingen, Germany
5
IBM STG, Bangalore, India
6
IBM STG, Austin, TX
7
IBM STG, Burlington, NY
8
IBM STG, Poughkeepsie, NY
4:15 PM
26.3 Reconfigurable Clock Networks for Random Skew Mitigation from
Subthreshold to Nominal Voltage
L. Lin, S. Jain, M. Alioto
National University of Singapore, Singapore, Singapore
4:30 PM
26.4 A 0.4-to-1V 1MHz-to-2GHz Switched-Capacitor Adiabatic Clock Driver
Achieving 55.6% Clock Power Reduction
L. G. Salem, P. P. Mercier
University of California, San Diego, CA
4:45 PM
26.5 Adaptive Clocking in the POWER9 TM Processor for Voltage Droop
Protection
M. S. Floyd 1 , P. J. Restle 2 , M. A. Sperling 3 , P. Owczarczyk 3 , E. J. Fluhr 1 , J. Friedrich 1 ,
P. Muench 3 , T. Diemoz 3 , P. Chuang 2 , C. Vezyrtzis 2
1
IBM, Austin, TX
2
IBM, Yorktown Heights, NY
3
IBM, Poughkeepsie, NY
Conclusion 5:15 PM
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