Mathematics for Computer Science

“mcs” — 2017/3/3 — 11:21 — page 71 — #79
3.7. References 71
and n C 2 binary outputs
c p n ; : : : ; p 1 ; p 0 :
If a n : : : a 1 a 0 are taken to be the .n C 1/-bit representation of an integer k then
cp n : : : p 1 p 0 is supposed to be the .n C 2/-bit binary representation of k C 1.
So a 1-bit add1-module just has input a 0 and outputs c; p 0 where
p 0 WWD a 0 XOR 1; .or more simply, p 0 WWD NOT.a 0 //;
c WWD a 0 :
In the ripple-carry design, a double-size half-adder with 2.n C 1/ inputs takes
twice as long to produce its output values as an .n C 1/-input ripple-carry circuit.
With parallel-design add1-modules, a double-size add1-module produces its output
values nearly as fast as a single-size add1-modules. To see how this works, suppose
the inputs of the double-size module are
a 2nC1 ; : : : ; a 1 ; a 0
and the outputs are
c; p 2nC1 ; : : : ; p 1 ; p 0 :
We will build the double-size add1-module by having two single-size add1-modules
work in parallel. The setup is illustrated in Figure 3.1.
Namely, the first single-size add1-module handles the first n C 1 inputs. The inputs
to this module are the low-order nC1 input bits a n ; : : : ; a 1 ; a 0 , and its outputs
will serve as the first n C 1 outputs p n ; : : : ; p 1 ; p 0 of the double-size module. Let
c .1/ be the remaining carry output from this module.
The inputs to the second single-size module are the higher-order n C 1 input bits
a 2nC1 ; : : : ; a nC2 ; a nC1 . Call its first n C 1 outputs r n ; : : : ; r 1 ; r 0 and let c .2/ be its
carry.
(a) Write a formula for the carry c of the double-size add1-module solely in terms
of carries c .1/ and c .2/ of the single-size add1-modules.
(b) Complete the specification of the double-size add1-module by writing propositional
formulas for the remaining outputs p nCi for 1 i n C 1. The formula
for p nCi should only involve the variables a nCi , r i 1 and c .1/ .
(c) Explain how to build an .nC1/-bit parallel-design half-adder from an .nC1/-
bit add1-module by writing a propositional formula for the half-adder output s i
using only the variables a i , p i and b.