Mathematics for Computer Science

“mcs” — 2017/3/3 — 11:21 — page 72 — #80
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Chapter 3
Logical Formulas
(d) The speed or latency of a circuit is determined by the largest number of gates
on any path from an input to an output. In an n-bit ripple carry circuit(Problem 3.6),
there is a path from an input to the final carry output that goes through about 2n
gates. In contrast, parallel half-adders are exponentially faster than ripple-carry
half-adders. Confirm this by determining the largest number of propositional operations,
that is, gates, on any path from an input to an output of an n-bit add1-module.
(You may assume n is a power of 2.)
c
a 2nC1 a nC2 a nC1
a n a 1 a 0
.nC1/-bit add1 c .1/ .nC1/-bit add1
r n r 1 r 0
2.nC2/-bit add1 module
c .2/
Figure 3.1 Structure of a Double-size add1 Module.
p 2nC1
p nC2 p nC1
p n p 1 p 0
Exam Problems
Problem 3.8.
Claim. There are exactly two truth environments (assignments) for the variables
M; N; P; Q; R; S that satisfy the following formula:
.P OR Q/ AND .Q OR R/ AND .R OR S/ AND .S OR P / AND M AND N
„ ƒ‚ … „ ƒ‚ … „ ƒ‚ … „ ƒ‚ …
clause (1)
clause (2)
clause (3)
clause (4)