2.2 BSP Rel. 1.0 for PPMC-275 Programmer's Guide
2.2 BSP Rel. 1.0 for PPMC-275 Programmer's Guide
2.2 BSP Rel. 1.0 for PPMC-275 Programmer's Guide
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List of APIs API Call Reference<br />
Table 14:MPSC Main Structure: MPSC_MAIN_STRUCT (cont.)<br />
Bits Field Bit<br />
Width<br />
2:0 MODE 3 Mode<br />
000 -HDLC (default)<br />
001 -Reserved<br />
010 -Reserved<br />
011 -Reserved<br />
100 -UART<br />
101 -BISYNC<br />
110 -Reserved<br />
111 -Reserved<br />
High<br />
Description<br />
31:30 SEDG 2 Synchronization Clock Edge<br />
The clock edge used by the DPLL <strong>for</strong><br />
adjusting the receive<br />
sample point due to drift in the receive<br />
signal.<br />
00 - Both rising and falling edges.<br />
(Default.)<br />
01 - Rising edge<br />
10 - Falling edge<br />
11 - No adjustment<br />
29:27 RENC 3 Receive Encoder<br />
Specifies the encoding method <strong>for</strong> the<br />
dedicated Rx channel DPLL.<br />
000 - NRZ (default)<br />
001 - NRZI (Mark, can be set to Space by<br />
setting RINV bit)<br />
010 - FM0 (can be set to FM1 by setting<br />
the RINV bit)<br />
011 - Reserved<br />
100 - Manchester<br />
101 - Reserved<br />
110 - Differential Manchester<br />
111 - Reserved<br />
5 - 76 VxWorks 5.5/Tornado <strong>2.2</strong> <strong>BSP</strong> <strong>Rel</strong>. <strong>1.0</strong> <strong>for</strong> <strong>PPMC</strong>-<strong>275</strong>
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