2.2 BSP Rel. 1.0 for PPMC-275 Programmer's Guide

API Call Reference List of APIs
Table 10:SDMA Driver Structure: MPSC_SDCMR (cont.)
Macro Field Description
STD Stop Tx
The SDMA stops transmission
at the end of frame
(i.e. at the end of buffer
with L bit set to ‘1’). After
transmitting the last
buffer, the transmit SDMA
goes to IDLE state.
The MV-64360 clears the
TXD bit when entering
IDLE state. After the
SDMA stops, the CPU
must write the first
descriptor address and
than set the TXD bit to ‘1’.
The MV-64360 signals the
CPU with
Interrupt when the stop
procedure is accomplished.
ABORT_RECEIVE AR Abort Receive
The CPU sets the AR bit
when it needs to abort a
receive SDMA channel
operation. When the AR
bit is set, the SDMA aborts
its operation and goes to
IDLE state. No descriptor
is closed. The MV-64360
clears both the AR and
ERD bits when entering
IDLE state. The CPU must
poll bit 15. When it is ‘0’,
the MV-64360 has completed
the abort sequence.
After an abort the CPU
should write the 1st
descriptor address and
then set ERD bit to ‘1’.
reserved2
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