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2.2 BSP Rel. 1.0 for PPMC-275 Programmer's Guide

2.2 BSP Rel. 1.0 for PPMC-275 Programmer's Guide

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API Call Reference List of APIs<br />

ISR Connection<br />

Interrupt Handling<br />

This stage fills each driver's ISR data structure with the in<strong>for</strong>mation<br />

regarding the connected user ISR. The Interrupt Controller<br />

driver decides which user ISR to connect to which data structure<br />

according to its enumerated macro that defines the interrupt cause<br />

distribution (High or Low Cause registers).<br />

When an interrupt is pending, the connected driver's ISR (connected<br />

in initialization phase) is invoked to search its data structure<br />

<strong>for</strong> the interrupt cause which initiated the interrupt. After the<br />

initiating interrupt has been identified, the appropriate user ISR is<br />

invoked.<br />

External Interface Data Structure<br />

The external interface data structure is provided here.<br />

ENUM GT_INT_CAUSE {The list of High and Low Interrupt causes (Total of 64 causes)}<br />

This enumerator creates the Global Cause register out of Main<br />

High and Low Interrupt Cause registers. When the High Cause<br />

register is first, each interrupt cause is represented by an integer.<br />

To hook a C routine to the MV Interrupt Controller, use this enum<br />

type to describe the MV cause that you would like to hook to (this<br />

is done <strong>for</strong> improved code readability).<br />

CAUSE DISTRIBUTOR<br />

MACROS<br />

CPU INT[0/1]* MASK<br />

SELECTION<br />

This driver defines Cause distribution macros. Each MV-64360<br />

interrupt pin is represented by a macro (or two). This macro<br />

defines which cause bits are active in each interrupt pin:<br />

· CPU_INT_HIGH_CAUSE CPU interrupt pin<br />

· CPU_INT_LOW_CAUSE CPU interrupt pin<br />

For example:<br />

#define CPU_INT_LOW_CAUSE (cause >=00 && cause<br />

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