Backside Circuit Edit on Device Level - New Methodologies - Imec
Backside Circuit Edit on Device Level - New Methodologies - Imec
Backside Circuit Edit on Device Level - New Methodologies - Imec
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Vdd<br />
p- MOS<br />
C<strong>on</strong>tact to Silicide<br />
● c<strong>on</strong>tact to the CoSi Silicide<br />
(CoSi covers every diffusi<strong>on</strong> / active)<br />
● possible without any Metal / C<strong>on</strong>tact<br />
● modificati<strong>on</strong> <strong>on</strong> device level<br />
in<br />
Vdd<br />
out<br />
n- MOS<br />
ONLY<br />
with CtS<br />
metal 1<br />
metal 2<br />
diffusi<strong>on</strong><br />
02.10.2006 Rudolf Schlangen EFUG 11<br />
GND<br />
berlin<br />
poly - gate<br />
n-well<br />
c<strong>on</strong>tact
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