Chapter 23 Controller Area Network (CAN).pdf

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Functional Description www.ti.com Figure 23-12. CPU Handling of a FIFO Buffer (Interrupt Driven) 0x8000 Status Change Interrupt Handling START Read Interrupt Identifier Case Interrupt Identifier Ifx Command Register [31:16] = 0x007F Message Number = Interrupt Identifier END Write Message Number to IF1/IF2 Command Register (Transfer Message to IF1/IF2 Registers, Clear NewDat and IntPnd) Read IF1/IF2 Message Control NewDat = 1 Yes Read Data From IF1/IF2 Data A,B EoB = 1 No Message Interrupt Else 0x0000 Next Message Number in This FIFO Buffer 4062 Controller Area Network (CAN) SPRUH73E–October 2011–Revised May 2012 Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated No Yes
www.ti.com Functional Description 23.3.16 CAN Bit Timing The DCAN supports bit rates between less than 1 kBit/s and 1000 kBit/s. Each member of the CAN network has its own clock generator, typically derived from a crystal oscillator. The bit timing parameters can be configured individually for each CAN node, creating a common bit rate even though the CAN nodes’ oscillator periods (f osc) may be different. The frequencies of these oscillators are not absolutely stable. Small variations are caused by changes in temperature or voltage and by deteriorating components. As long as the variations remain inside a specific oscillator tolerance range (df), the CAN nodes are able to compensate for the different bit rates by resynchronizing to the bit stream. In many cases, the CAN bit synchronization will amend a faulty configuration of the CAN bit timing to such a degree that only occasionally an error frame is generated. In the case of arbitration however, when two or more CAN nodes simultaneously try to transmit a frame, a misplaced sample point may cause one of the transmitters to become error passive. The analysis of such sporadic errors requires a detailed knowledge of the CAN bit synchronization inside a CAN node and of the CAN nodes’ interaction on the CAN bus. Even if minor errors in the configuration of the CAN bit timing do not result in immediate failure, the performance of a CAN network can be reduced significantly. 23.3.16.1 Bit Time and Bit Rate According to the CAN specification, the bit time is divided into four segments (see Figure 23-13): • Synchronization segment (Sync_Seg) • Propagation time segment (Prop_Seg) • Phase buffer segment 1 (Phase_Seg1) • Phase buffer segment 2 (Phase_Seg2) Sync_ Seg 1 Time Quantum (t q ) Figure 23-13. Bit Timing Nominal CAN Bit Time Prop_Seg Phase_Seg1 Phase_Seg2 Sample Point Each segment consists of a specific number of time quanta. The length of one time quantum (t q), which is the basic time unit of the bit time, is given by the CAN_CLK and the baud rate prescalers (BRPE and BRP). With these two baud rate prescalers combined, divider values from 1 to 1024 can be programmed: t q = Baud Rate Prescaler / CAN_CLK Apart from the fixed length of the synchronization segment, these numbers are programmable. Table 23-7 describes the minimum programmable ranges required by the CAN protocol. A given bit rate may be met by different bit time configurations. SPRUH73E–October 2011–Revised May 2012 Controller Area Network (CAN) Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated 4063
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