Chapter 23 Controller Area Network (CAN).pdf
Chapter 23 Controller Area Network (CAN).pdf
Chapter 23 Controller Area Network (CAN).pdf
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D<strong>CAN</strong> Registers www.ti.com<br />
<strong>23</strong>.4.1.5 Interrupt Register (D<strong>CAN</strong> INT)<br />
The interrupt register (D<strong>CAN</strong> INT) is shown in Figure <strong>23</strong>-<strong>23</strong> and described in Table <strong>23</strong>-18.<br />
Figure <strong>23</strong>-<strong>23</strong>. Interrupt Register (D<strong>CAN</strong> INT)<br />
31 24 <strong>23</strong> 16<br />
Reserved Int1ID[7:0]<br />
R-0 R-0<br />
15 0<br />
LEGEND: R = Read only; -n = value after reset<br />
Bit Field Value Description<br />
Int0ID[15:0]<br />
R-0<br />
Table <strong>23</strong>-18. Interrupt Register (D<strong>CAN</strong> INT) Field Descriptions<br />
31-24 Reserved 0 These bits are always read as 0. Writes have no effect.<br />
<strong>23</strong>-16 Int1ID[<strong>23</strong>:16] Interrupt 1 Identifier (indicates the message object with the highest pending interrupt)<br />
0x00 No interrupt is pending<br />
0x01-0x80 Number of message object which caused the interrupt.<br />
0x81-0xFF Unused<br />
If several interrupts are pending, the <strong>CAN</strong> interrupt register will point to the pending interrupt<br />
with the highest priority. The D<strong>CAN</strong>1INT interrupt line remains active until Int1ID reaches<br />
value 0 (the cause of the interrupt is reset) or until IE1 is cleared.<br />
A message interrupt is cleared by clearing the message object's IntPnd bit.<br />
Among the message interrupts, the message object's interrupt priority decreases with<br />
increasing message number.<br />
15-0 Int0ID[15:0] Interrupt Identifier (the number here indicates the source of the interrupt)<br />
0x0000 No interrupt is pending<br />
0x0001- Number of message object which caused the interrupt.<br />
0x0080<br />
0x0081- Unused<br />
0x7FFF<br />
0x8000 Error and status register value is not 0x07.<br />
0x8001- Unused<br />
0xFFFF<br />
If several interrupts are pending, the <strong>CAN</strong> interrupt register will point to the pending interrupt<br />
with the highest priority. The D<strong>CAN</strong>0INT interrupt line remains active until Int0ID reaches<br />
value 0 (the cause of the interrupt is reset) or until IE0 is cleared.<br />
The Status interrupt has the highest priority. Among the message interrupts, the message<br />
object's interrupt priority decreases with increasing message number.<br />
4086 <strong>Controller</strong> <strong>Area</strong> <strong>Network</strong> (<strong>CAN</strong>) SPRUH73E–October 2011–Revised May 2012<br />
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