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Chapter 23 Controller Area Network (CAN).pdf

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Functional Description www.ti.com<br />

Bit #<br />

Table <strong>23</strong>-12. Message RAM Representation in RAM Direct Access Mode (continued)<br />

31/ 30/ 29/ 29/ 27/ 26/ 25/ 24/ <strong>23</strong>/ 22/ 21/ 20/ 19/ 18/ 17/ 16/<br />

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0<br />

MsgAddr + 0x0C Msk[12:0] Xtd Dir ID[28]<br />

Reserved<br />

Msg UMa RxT Rmt MX<br />

MsgAddr + 0x10 MsgLst Unused TxIE EOB MDir<br />

Lst sk E En td<br />

NOTE: Writes to unused bits have no effect.<br />

<strong>23</strong>.3.19 GIO Support<br />

The <strong>CAN</strong>_RX and <strong>CAN</strong>_TX pins of the D<strong>CAN</strong> module can be used as general purpose IO pins, if <strong>CAN</strong><br />

functionality is not needed. This function is controlled by the <strong>CAN</strong> TX IO control register (D<strong>CAN</strong> TIOC)<br />

(see Section <strong>23</strong>.4.1.29) and the <strong>CAN</strong> RX IO control register (D<strong>CAN</strong> RIOC) (see Section <strong>23</strong>.4.1.30).<br />

4078 <strong>Controller</strong> <strong>Area</strong> <strong>Network</strong> (<strong>CAN</strong>) SPRUH73E–October 2011–Revised May 2012<br />

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Copyright © 2011–2012, Texas Instruments Incorporated<br />

Parity<br />

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