Chapter 23 Controller Area Network (CAN).pdf

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23.3.17.2 IF3 Register Set
Figure 23-18. Data Transfer Between IF1/IF2 Registers and Message RAM
No
Read Message Object to IF1/IF2
START
Write Message Number to
Command Register
Yes
Busy = 1
No Yes
WR/RD = 1
Busy = 0
Read Message Object to IF1/IF2
Write IF1/IF2 to Message RAM
The IF3 register set can automatically be updated with received message objects without the need to
initiate the transfer from message RAM by CPU. The intention of this feature of IF3 is to provide an
interface for the DMA to read packets efficiently. The automatic update functionality can be programmed
for each message object (Section 23.4.1.28).
All valid message objects in message RAM which are configured for automatic update, will be checked for
active NewDat flags. If such a message object is found, it will be transferred to the IF3 register (if no
previous DMA transfers are ongoing), controlled by IF3 Observation register. If more than one NewDat
flag is active, the message object with the lowest number has the highest priority for automatic IF3 update.
The NewDat bit in the message object will be reset by a transfer to IF3.
If DCAN internal IF3 update is complete, a DMA request is generated. The DMA request stays active until
first read access to one of the IF3 registers. The DMA functionality has to be enabled by setting bit DE3 in
CAN control register. Please refer to the device datasheet to find out if this DMA source is available.
NOTE: The IF3 register set can not be used for transferring data into message objects.
4072 Controller Area Network (CAN) SPRUH73E–October 2011–Revised May 2012
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