Chapter 23 Controller Area Network (CAN).pdf

DCAN Registers www.ti.com
Table 23-13. DCAN Control Register Summary Table (continued)
Offset Acronym Description Section
0x1E0 DCAN TIOC CAN TX IO Control Register Section 23.4.1.29
0x1E4 DCAN RIOC CAN RX IO Control Register Section 23.4.1.30
23.4.1.1 CAN Control Register (DCAN CTL)
The CAN control register (DCAN CTL) is shown in Figure 23-19 and described in Table 23-14.
Figure 23-19. CAN Control Register (DCAN CTL)
31 26 25 24 23 21 20 19 18 17 16
Reserved WUBA PDR Reserved DE3 DE2 DE1 IE1 InitDbg
R-0 R/W-0 R/W-0 R-0 R/W-0 R/W-0 R/W-0 R/W-0 R-0
15 14 13 10 9 8 7 6 5 4 3 2 1 0
SWR Reserv PMD ABO IDS Test CCE DAR Reserv EIE SIE IE0 Init
ed ed
R/WP- R-0 R/W-0x5 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R-0 R/W-0 R/W-0 R/W-0 R/W-1
0
LEGEND: R/W = Read/Write; R = Read only; WP = Write protected by init bit; -n = value after reset
Bit Field Value Description
Table 23-14. CAN Control Register (DCAN CTL) Field Descriptions
31-26 Reserved 0 These bits are always read as 0. Writes have no effect.
26 WUBA Automatic wake up on bus activity when in local power-down mode
0 No detection of a dominant CAN bus level while in local power-down mode.
1 Detection of a dominant CAN bus level while in local power-down mode is enabled. On occurrence
of a dominant CAN bus level, the wake up sequence is started (Additional information can be found
in Local Power-Down Mode).
Note: The CAN message, which initiates the bus activity, cannot be received. This means that the
first message received in power down and automatic wake-up mode, will be lost.
24 PDR Request for local low power-down mode
0 No application request for local low power-down mode. If the application has cleared this bit while
DCAN in local power-down mode, also the Init bit has to be cleared.
1 Local power-down mode has been requested by application. The DCAN will acknowledge the local
power-down mode by setting bit PDA in the error and status register. The local clocks will be turned
off by DCAN internal logic (Additional information can be found in Local Power-Down Mode).
23-21 Reserved 0 These bits are always read as 0. Writes have no effect.
20 DE3 Enable DMA request line for IF3
0 Disabled
1 Enabled
19 DE2 Enable DMA request line for IF2
Note: A pending DMA request for IF3 remains active until first access to one of the IF3 registers.
0 Disabled
1 Enabled
18 DE1 Enable DMA request line for IF1
Note: A pending DMA request for IF2 remains active until first access to one of the IF2 registers.
0 Disabled
1 Enabled
Note: A pending DMA request for IF1 remains active until first access to one of the IF1 registers.
4080 Controller Area Network (CAN) SPRUH73E–October 2011–Revised May 2012
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