Chapter 23 Controller Area Network (CAN).pdf
Chapter 23 Controller Area Network (CAN).pdf
Chapter 23 Controller Area Network (CAN).pdf
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<strong>23</strong>.2.2 D<strong>CAN</strong> Clock and Reset Management<br />
The D<strong>CAN</strong> controllers have separate bus interface and functional clocks.<br />
Table <strong>23</strong>-2. D<strong>CAN</strong> Clock Signals<br />
Clock Signal Max Freq Reference / Source Comments<br />
D<strong>CAN</strong>_ocp_clk 100 MHz CORE_CLKOUTM4 / 2 pd_per_l4ls_gclk<br />
Interface clock from PRCM<br />
D<strong>CAN</strong>_io_clk 26 MHz CLK_M_OSC pd_per_can_clk<br />
Functional clock from PRCM<br />
<strong>23</strong>.2.3 D<strong>CAN</strong> Pin List<br />
The external signals for the D<strong>CAN</strong> module are shown in the following table.<br />
Table <strong>23</strong>-3. D<strong>CAN</strong> Pin List<br />
Pin Type Description<br />
D<strong>CAN</strong>x_TX O D<strong>CAN</strong> transmit line<br />
D<strong>CAN</strong>x_RX I D<strong>CAN</strong> receive line<br />
4040 <strong>Controller</strong> <strong>Area</strong> <strong>Network</strong> (<strong>CAN</strong>) SPRUH73E–October 2011–Revised May 2012<br />
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