Fast Fourier Transforms on Motorola's Digital Signal Processors

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This must be kept in mind in convolution-based applications, where the forward as well as inverse transforms are used; the incoming signal stream needs to be segmented, and the computed signal segments need to be pieced together to construct the complete output stream. Most basic textbooks on digital signal processing discuss techniques for piecing together the output stream (see Reference 3). ■ MOTOROLA 2-9
“Since there are two independent variables (time and frequency) in the <strong>Fourier</strong> transform, dividing (or decimating) the DFT into smaller ones can be done in two ways.” SECTION 3 The <strong>Fast</strong> <strong>Fourier</strong> Transform 3.1 Motivation Upon closer examination of Eqn. 2-10, it becomes clear that for every frequency point, N-1 complex summations and N complex multiplications need to be evaluated. Since there are N frequency points to be evaluated, this gives a total of N(N-1) complex sums, and N 2 complex multiplications. Counting two real sums for every complex one, and four real multiplications plus two real summations for every complex multiplication, gives a total of 4N 2 - 2N real summations and 4 N 2 real multiplications. The above numbers grow rapidly for increasing N. For N=1024 (1024-point DFT), 4,194,304 real multiplications are required. If this is computed on a DSP56001/ DSP56002 with a 27-MHz clock, it takes 0.31 seconds just to execute that many real multiplications. Since the DFT computation needs to be completed by the time the next 1024 data points are collected for real-time performance, the sampling rate is limited to a maximum of 3.3 kHz. Obviously, faster solutions are needed. MOTOROLA 3-1
Page 1 and 2: Motorola’s High-Performance DSP T
Page 3 and 4: SECTION 1 Definition and History SE
Page 5 and 6: SECTION 5 Optimizing Performance of
Page 7 and 8: APPENDIX B Real-Valued Input FFT Ta
Page 9 and 10: Figure 4-3 Figure 4-4 Figure 4-5 Fi
Page 11 and 12: Table 8-1 Table 8-2 Table 8-3 Table
Page 13 and 14: When interpreted as an infinite sum
Page 15 and 16: 2. Pattern-Based ⎯ Many problems
Page 17 and 18: In summary, the basic nature of the
Page 19 and 20: ecause: j2πfnT+j2πn e T - ⎛ ---
Page 21 and 22: 2.2 Windowing and Windowing Effects
Page 23 and 24: xf () x(nT) 1 0.9 0.8 0.7 0.6 0.5 0
Page 25: Note that many textbooks simply def
Page 29 and 30: appropriately called the decimation
Page 31 and 32: x(0) x(4) Figure 3-4 Decimation-in-
Page 33 and 34: Binary Index 000 x(0) 001 010 011 1
Page 35 and 36: 3.4 The Decimation-in- Frequency Ra
Page 37 and 38: DSP56001/2 and DSP96002 hardware fe
Page 39 and 40: 4. Bit-reversed addressing mode 5.
Page 41 and 42: 4.3 Complexity of a Radix-2 DIT FFT
Page 43 and 44: The data paths are 24 bits wide, th
Page 45 and 46: The kernel shown in Figure 4-4 exec
Page 47 and 48: ;Alters Program Control Registers ;
Page 49 and 50: PORT A CLK 4 ADDRESS 32 Control 19
Page 51 and 52: ;r0 ➨ A ;r1 ➨ B ;r4 ➨ C ;r5
Page 53 and 54: 5 5 7 ADDRESS Sigma Delta Codec PI/
Page 55 and 56: limits its results to those bits. T
Page 57 and 58: flow in the FFT calculation is to s
Page 59 and 60: of the sine table, 256 points. Howe
Page 61 and 62: normal_order=output_pointer; bitrev
Page 63 and 64: A′ A CW c BW b DW c W b = + + ( +
Page 65 and 66: ;r0->A,r4->B, r1->C, r6->D; ;r1->A
Page 67 and 68: Ar′ = Ar + Br + ( Dr + Cr) Ai′
Page 69 and 70: “Optimization saves . . . 2067 in
Page 71 and 72: plexity to practical complexity ref
Page 73 and 74: 5.1.2 Optimization for Fast
Page 75 and 76: 3. pass. This change results in lon
Page 77 and 78:
5.2 Example of Optimization 5.2.1 F
Page 79 and 80:
Pass 0 1 2 3 4 5 6 7 8 A B C D W=(1
Page 81 and 82:
The fully optimized 1024-point comp
Page 83 and 84:
6.1 Real-Valued Input FFT Algorithm
Page 85 and 86:
The twiddle factors appear to be in
Page 87 and 88:
X=A+jB Y=C+jD X’=A+C+j(D+B) - Y
Page 89 and 90:
takes four points in and four point
Page 91 and 92:
Z( k) = DFT[ z( n) ] = DFT[ x( n) +
Page 93 and 94:
F( k) a real sequence with N points
Page 95 and 96:
Eight multiplications, five additio
Page 97 and 98:
further: 1. Since the input data is
Page 99 and 100:
6.4 The Goertzel Algorithm Previous
Page 101 and 102:
The power of magnitude of the DFT c
Page 103 and 104:
SSI or HI The double buffering is i
Page 105 and 106:
“To implement Eqn. 7-1, a two dim
Page 107 and 108:
F( k) where: N - 1 2c( k) ---------
Page 109 and 110:
7.2.2 Two Dimensional DCT A one dim
Page 111 and 112:
facturer may offer a higher perform
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8.2.1.1 Complex FFT on Floating-Poi
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8.2.2 FFT on Fixed-Point DSPs As me
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“Motorola's family of digital sig
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APPENDIX A Fully Optimized Complex
Page 121 and 122:
;**********************************
Page 123 and 124:
;**********************************
Page 125 and 126:
movem 2,m5 movem 2,m7 move #data,r0
Page 127 and 128:
; ------------ NORMAL RADIX-2 BUTTE
Page 129 and 130:
nop nop jmp * end ; ; Sine-Cosine T
Page 131 and 132:
; Input signal for FFT rfft56.asm a
Page 133 and 134:
move #POINTS/2-1,m0 ;modulo address
Page 135 and 136:
; r0->A,r1->B,r4->A’,r5->B’,r6-
Page 137 and 138:
_inner_pass do n3,_end_grp ;do grou
Page 139 and 140:
APPENDIX B Real-Valued Input FFT B.
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count set 0 dup points/2 dc @cos(@c
Page 143 and 144:
B.2 Real FFT for DSP56001/2 ; ; Thi
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dup points/4 dc @cos(@cvf(count)*fr
Page 147 and 148:
macr y1,y0,a y:(r4),y0 ;a=Wi*H2r-Wr
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Fast Fourier Transforms on Motorola's Digital Signal Processors

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