Fast Fourier Transforms on Motorola's Digital Signal Processors

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DSP56001/2 is particularly well suited for looped program execution because it has hardware DO-loop capability. Once a loop is entered through the DO instruction, this loop is executed without any time penalty. The resulting program takes 40 words in program memory. This is the most compact implementation of the radix-2 DIT FFT. A 1024-point complex FFT using this code executes in 4.72 ms when using a 27-MHz clock. ;This program originally available on the Motorola DSP bulletin board. ;It is provided under a DISCLAIMER OF WARRANTY available from ;Motorola DSP Operation, 6501 Wm. Cannon Drive W., Austin, Tx., 78735. ; ;Radix 2, In-Place, Decimation-In-Time FFT (smallest code size). ; ;Last Update 30 Sept. 86 Version 1.1 ; fftr2a macro points, data, coef fftr2a ident 1,1 ; ;Radix 2 Decimation in Time In-Place <strong>Fast</strong> <strong>Fourier</strong> Transform Routine ; Complex input and output data ; Real data in X memory ; Imaginary data in Y memory ; Normally ordered input data ; Bit reversed output data ; Coefficient lookup table ; -Cosine values in X memory ; -Sine values in Y memory ; ;Macro Call - fftr2a points,data,coef ; ; points number of points (2-32768, power of 2) ; data start of data buffer ; coef start of sine/cosine table ; ;Alters Data ALU Registers ; x1 x0 y1 y0 ; a2 a1 a0 a ; b2 b1 b0 b ; ;Alters Address Registers ; r0 n0 m0 ; r1 n1 m1 ; n2 ; ; r4 n4 m4 ; r5 n6 m5 ; r6 n6 m6 ; Figure 4-5 A Simple, Triple-Nested DO Loop Radix-2 DIT FFT on DSP56001/2 (sheet 1 of 2) MOTOROLA 4-11
;Alters Program Control Registers ; pc sr ;Uses 6 locations or System Stack ;Latest Revision September 30, 1986 ;r0 points to A ;r1 points to B ;r4 points to C ;r5 points to D ;r6 points to twiddle factor move # points/2,n0;initialize butterflies per group move # 1,n2 ;initialize groups per pass move # points/4,n6 ;initialize C pointer offset move #-1,mo ;initialize A and B address modifiers move m0,m1 ;for linear addressing move m0,m4 move m0,m5 move #0,m6 ;initialize C address modifier for ;reverse carry (bit-reversed) addressing ; ;Perform all FFT passes with triple nested DO loop ; d0 #(αcvi(αlog(points)/(αlog(2)+0.5)_end_pass move #data,r0 ;initialize A input pointer move r0,r4 ;initialize A output pointer lua (r0)+n0,r1[;initialize B input pointer move #coef,r6 ;initialize C input pointer lua (r1)-,r5 ;initialize B output pointer move n0,n1 ;initialize pointer offsets move n0,n4 move n0,n5 d0 n2,_end_grp move x:(r1),x1y:(r6),y0 ;lookup -sine and ;-cosine values move x:(r5),a y:(r0),b ;preload data move x:(r6)+n6,x0 ;update C pointer do n0,_end_bfy mac x1,y0,b y:(r1)+,y1 ;Radix 2 DIT ;butterfly kernel macr -x0,y1,b a,x:(r5)+ y:(r0),a subl b,a x:(r0),b b,y:(r4) mac -x1,x0,b x:(r0)+,a a,y:(r5) macr -y1,y0,b tx:(r1),x1 subl b,a b,x:(r4)+ y:(r0),b _end_bfy move a,x:(r5)+n5 y:(r1)+n1,y1 ;update A and B pointers move x:(r0)+0,x1 y:(r4)+4,y1 _end_grp move n0,b1 lsr b n2,a1 ;divide butterflies per group by two lsl a b1,n0 ;multiply groups per pass by two move a1,n2 _end_pass endm Figure 4-5 A Simple, Triple-Nested DO Loop Radix-2 DIT FFT on DSP56001/2 (sheet 2 of 2) 4-12 MOTOROLA
Page 1 and 2: Motorola’s High-Performance DSP T
Page 3 and 4: SECTION 1 Definition and History SE
Page 5 and 6: SECTION 5 Optimizing Performance of
Page 7 and 8: APPENDIX B Real-Valued Input FFT Ta
Page 9 and 10: Figure 4-3 Figure 4-4 Figure 4-5 Fi
Page 11 and 12: Table 8-1 Table 8-2 Table 8-3 Table
Page 13 and 14: When interpreted as an infinite sum
Page 15 and 16: 2. Pattern-Based ⎯ Many problems
Page 17 and 18: In summary, the basic nature of the
Page 19 and 20: ecause: j2πfnT+j2πn e T - ⎛ ---
Page 21 and 22: 2.2 Windowing and Windowing Effects
Page 23 and 24: xf () x(nT) 1 0.9 0.8 0.7 0.6 0.5 0
Page 25 and 26: Note that many textbooks simply def
Page 27 and 28: “Since there are two independent
Page 29 and 30: appropriately called the decimation
Page 31 and 32: x(0) x(4) Figure 3-4 Decimation-in-
Page 33 and 34: Binary Index 000 x(0) 001 010 011 1
Page 35 and 36: 3.4 The Decimation-in- Frequency Ra
Page 37 and 38: DSP56001/2 and DSP96002 hardware fe
Page 39 and 40: 4. Bit-reversed addressing mode 5.
Page 41 and 42: 4.3 Complexity of a Radix-2 DIT FFT
Page 43 and 44: The data paths are 24 bits wide, th
Page 45: The kernel shown in Figure 4-4 exec
Page 49 and 50: PORT A CLK 4 ADDRESS 32 Control 19
Page 51 and 52: ;r0 ➨ A ;r1 ➨ B ;r4 ➨ C ;r5
Page 53 and 54: 5 5 7 ADDRESS Sigma Delta Codec PI/
Page 55 and 56: limits its results to those bits. T
Page 57 and 58: flow in the FFT calculation is to s
Page 59 and 60: of the sine table, 256 points. Howe
Page 61 and 62: normal_order=output_pointer; bitrev
Page 63 and 64: A′ A CW c BW b DW c W b = + + ( +
Page 65 and 66: ;r0->A,r4->B, r1->C, r6->D; ;r1->A
Page 67 and 68: Ar′ = Ar + Br + ( Dr + Cr) Ai′
Page 69 and 70: “Optimization saves . . . 2067 in
Page 71 and 72: plexity to practical complexity ref
Page 73 and 74: 5.1.2 Optimization for Fast
Page 75 and 76: 3. pass. This change results in lon
Page 77 and 78: 5.2 Example of Optimization 5.2.1 F
Page 79 and 80: Pass 0 1 2 3 4 5 6 7 8 A B C D W=(1
Page 81 and 82: The fully optimized 1024-point comp
Page 83 and 84: 6.1 Real-Valued Input FFT Algorithm
Page 85 and 86: The twiddle factors appear to be in
Page 87 and 88: X=A+jB Y=C+jD X’=A+C+j(D+B) - Y
Page 89 and 90: takes four points in and four point
Page 91 and 92: Z( k) = DFT[ z( n) ] = DFT[ x( n) +
Page 93 and 94: F( k) a real sequence with N points
Page 95 and 96: Eight multiplications, five additio
Page 97 and 98:
further: 1. Since the input data is
Page 99 and 100:
6.4 The Goertzel Algorithm Previous
Page 101 and 102:
The power of magnitude of the DFT c
Page 103 and 104:
SSI or HI The double buffering is i
Page 105 and 106:
“To implement Eqn. 7-1, a two dim
Page 107 and 108:
F( k) where: N - 1 2c( k) ---------
Page 109 and 110:
7.2.2 Two Dimensional DCT A one dim
Page 111 and 112:
facturer may offer a higher perform
Page 113 and 114:
8.2.1.1 Complex FFT on Floating-Poi
Page 115 and 116:
8.2.2 FFT on Fixed-Point DSPs As me
Page 117 and 118:
“Motorola's family of digital sig
Page 119 and 120:
APPENDIX A Fully Optimized Complex
Page 121 and 122:
;**********************************
Page 123 and 124:
;**********************************
Page 125 and 126:
movem 2,m5 movem 2,m7 move #data,r0
Page 127 and 128:
; ------------ NORMAL RADIX-2 BUTTE
Page 129 and 130:
nop nop jmp * end ; ; Sine-Cosine T
Page 131 and 132:
; Input signal for FFT rfft56.asm a
Page 133 and 134:
move #POINTS/2-1,m0 ;modulo address
Page 135 and 136:
; r0->A,r1->B,r4->A’,r5->B’,r6-
Page 137 and 138:
_inner_pass do n3,_end_grp ;do grou
Page 139 and 140:
APPENDIX B Real-Valued Input FFT B.
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count set 0 dup points/2 dc @cos(@c
Page 143 and 144:
B.2 Real FFT for DSP56001/2 ; ; Thi
Page 145 and 146:
dup points/4 dc @cos(@cvf(count)*fr
Page 147 and 148:
macr y1,y0,a y:(r4),y0 ;a=Wi*H2r-Wr
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