Fast Fourier Transforms on Motorola's Digital Signal Processors

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each pass has 256 radix-2 butterflies and the first seven passes have 860 trivial butterflies. 772 of these radix-2 butterflies require 4.5 instruction cycles (simple radix-4 butterflies) while 88 of them require 5 instruction cycles. Therefore, the total cycle time for trivial butterflies is 772 x 4.5 + 88 x 5 = 3,914 which means a savings of 860 x 6 - 3914 = 1,246 cycles when compared to a non-optimization case. For program simplicity, the above calculation does not utilize the trivial butterflies in passes 7 and 8. CFFT56.ASM uses N/2 real twiddle factors. This scheme reduces the data memory requirement and also reduces the structure overhead on group DO loops, because the group number in each pass changes to half of the previous scheme. CFFT56.ASM fully utilizes internal memory to avoid cycle stretch when the DSP56001/2 accesses two data. A 512-point complex FFT is divided into two 256-point parts. The first 256-point part remains in internal memory until the last pass. The second 256-point data loads into internal memory after the first pass and stays there until the last pass. The last two passes are implemented by two separate single loops to avoid the penalty of DO loop set-up. Each group has four radix-2 butterflies in the next-to-last pass, and two in the last pass. If group DO loop is still used, then each butterfly may take 6.75 and 7.5 cycles in the next-to-last pass and the last pass, respectively. The cycles saved from the separated DO loops are 256 x 6.75 + 256 x 7.5 - 512 x 6 = 576. 5-10 MOTOROLA
Pass 0 1 2 3 4 5 6 7 8 A B C D W=(1,0) W = (0,-j) calculated by R4 butterfly W = (0,-j) calculated by R2 butterfly Figure 5-1 Trivial twiddle factors in a 12-point complex radix-2 DIT FFT. The butterflies in highlighted groups can be calculated without multiplications. A, B, C, and D are radix-4 butterfly pointers. MOTOROLA 5-11
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Motorola’s High-Performance DSP T
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SECTION 1 Definition and History SE
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SECTION 5 Optimizing Performance of
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APPENDIX B Real-Valued Input FFT Ta
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Figure 4-3 Figure 4-4 Figure 4-5 Fi
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Table 8-1 Table 8-2 Table 8-3 Table
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When interpreted as an infinite sum
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2. Pattern-Based ⎯ Many problems
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In summary, the basic nature of the
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ecause: j2πfnT+j2πn e T - ⎛ ---
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2.2 Windowing and Windowing Effects
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xf () x(nT) 1 0.9 0.8 0.7 0.6 0.5 0
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Note that many textbooks simply def
Page 27 and 28: “Since there are two independent
Page 29 and 30: appropriately called the decimation
Page 31 and 32: x(0) x(4) Figure 3-4 Decimation-in-
Page 33 and 34: Binary Index 000 x(0) 001 010 011 1
Page 35 and 36: 3.4 The Decimation-in- Frequency Ra
Page 37 and 38: DSP56001/2 and DSP96002 hardware fe
Page 39 and 40: 4. Bit-reversed addressing mode 5.
Page 41 and 42: 4.3 Complexity of a Radix-2 DIT FFT
Page 43 and 44: The data paths are 24 bits wide, th
Page 45 and 46: The kernel shown in Figure 4-4 exec
Page 47 and 48: ;Alters Program Control Registers ;
Page 49 and 50: PORT A CLK 4 ADDRESS 32 Control 19
Page 51 and 52: ;r0 ➨ A ;r1 ➨ B ;r4 ➨ C ;r5
Page 53 and 54: 5 5 7 ADDRESS Sigma Delta Codec PI/
Page 55 and 56: limits its results to those bits. T
Page 57 and 58: flow in the FFT calculation is to s
Page 59 and 60: of the sine table, 256 points. Howe
Page 61 and 62: normal_order=output_pointer; bitrev
Page 63 and 64: A′ A CW c BW b DW c W b = + + ( +
Page 65 and 66: ;r0->A,r4->B, r1->C, r6->D; ;r1->A
Page 67 and 68: Ar′ = Ar + Br + ( Dr + Cr) Ai′
Page 69 and 70: “Optimization saves . . . 2067 in
Page 71 and 72: plexity to practical complexity ref
Page 73 and 74: 5.1.2 Optimization for Fast
Page 75 and 76: 3. pass. This change results in lon
Page 77: 5.2 Example of Optimization 5.2.1 F
Page 81 and 82: The fully optimized 1024-point comp
Page 83 and 84: 6.1 Real-Valued Input FFT Algorithm
Page 85 and 86: The twiddle factors appear to be in
Page 87 and 88: X=A+jB Y=C+jD X’=A+C+j(D+B) - Y
Page 89 and 90: takes four points in and four point
Page 91 and 92: Z( k) = DFT[ z( n) ] = DFT[ x( n) +
Page 93 and 94: F( k) a real sequence with N points
Page 95 and 96: Eight multiplications, five additio
Page 97 and 98: further: 1. Since the input data is
Page 99 and 100: 6.4 The Goertzel Algorithm Previous
Page 101 and 102: The power of magnitude of the DFT c
Page 103 and 104: SSI or HI The double buffering is i
Page 105 and 106: “To implement Eqn. 7-1, a two dim
Page 107 and 108: F( k) where: N - 1 2c( k) ---------
Page 109 and 110: 7.2.2 Two Dimensional DCT A one dim
Page 111 and 112: facturer may offer a higher perform
Page 113 and 114: 8.2.1.1 Complex FFT on Floating-Poi
Page 115 and 116: 8.2.2 FFT on Fixed-Point DSPs As me
Page 117 and 118: “Motorola's family of digital sig
Page 119 and 120: APPENDIX A Fully Optimized Complex
Page 121 and 122: ;**********************************
Page 123 and 124: ;**********************************
Page 125 and 126: movem 2,m5 movem 2,m7 move #data,r0
Page 127 and 128: ; ------------ NORMAL RADIX-2 BUTTE
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nop nop jmp * end ; ; Sine-Cosine T
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; Input signal for FFT rfft56.asm a
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move #POINTS/2-1,m0 ;modulo address
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; r0->A,r1->B,r4->A’,r5->B’,r6-
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_inner_pass do n3,_end_grp ;do grou
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APPENDIX B Real-Valued Input FFT B.
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count set 0 dup points/2 dc @cos(@c
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B.2 Real FFT for DSP56001/2 ; ; Thi
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dup points/4 dc @cos(@cvf(count)*fr
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macr y1,y0,a y:(r4),y0 ;a=Wi*H2r-Wr
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Fast Fourier Transforms on Motorola's Digital Signal Processors

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