3M & SUSS announce agreement on temporary wafer ... - I-Micronews

More documents

Recommendations

Info

3-D Architectures for Semiconductor Integration and Packaging The Practical and Competitive Landscape on the Path to Implementation 9–11 December 2009 Hyatt Regency San Francisco Airport Hotel Burlingame, California For more information visit: http://techventure.rti.org Industry leaders have been speaking at and attending RTI’s conference, 3-D Architectures for Semiconductor Integration and Packaging, since 2004 and have benefited from the unique opportunity offered by this conference to explore the technology and business implications of the trend toward 3-D integration and packaging. This conference series has helped define this new facet of the semiconductor industry. It offers a unique perspective of the techno-business aspects of this emerging commercial opportunity, combining technology with business, research developments with practical insights, to offer industry leaders the information needed to plan and move forward with confidence. This conference targets senior-level technologists, managers, and business executives from the world’s leading companies and research institutions, and offers attendees the opportunity to learn from the presentations given by invited industry leaders, from the ample networking opportunities during the conference, and from the expanded exhibit offerings of this year’s event. 6–8 OctOber, 2009 Dresden, Germany connect with europe’s technology Leaders and expand Your Opportunities in Infinite Ways. SEMICON Europa is the only event in Europe focused on connecting people and companies with the technologies and innovations making advanced microelectronics and related technologies possible. From device design to final manufacturing, no other event in Europe brings you better face-to-face contact with customers and technology partners than SEMICON Europa. Printed on recycled paper This is SEMICON Europa. See You at SeMIcON europa 2009 reGISter NOW: WWW.SeMIcONeurOpa.OrG 14
J U L Y 2 0 0 9 i s s u e n ° 1 1 N e w s l e t t e r o n 3 D I C , T S V , W L P & E m b e d d e d T e c h n o l o g i e s NXP to sell French fab in Caen: Spin-out of new 3-D IC Company ahead Dutch semiconductor specialist NXP Semiconductors <strong>announce</strong>d plans to sell its French production unit in Caen to a group of unnamed investors, ADP News reported on 22 April 2009. The new owners will set up a new company to engage in the 3-D technology sector and employ a staff of 90 people. The company did not disclose financial details, but said that it hopes to close the deal by the end of April, and the new company will start activity by mid-May. Some of the plant's assets will be purchased by the new shareholders. NXP <strong>announce</strong>d its first intentions to sell the French plant in September 2008, but met with protests of trade unions and local institutions. www.nxp.com Rudolph Technologies & SEMATECH extend collaboration on 3D TSV process control Rudolph Technologies and SEMATECH <strong>announce</strong>d today that Rudolph has joined SEMATECH’s 3D Interconnect Program at the College of Nanoscale Science and Engineering (CNSE) of the University at Albany. The joint partnership is a continuation of collaborative efforts in process characterization, with a new focus on 3D IC (three-dimensional integrated circuits) processing and enhancing process control of TSV (throughsilicon vias) manufacturing. This is the second year that Rudolph will serve as a Member of SEMATECH. As a member of SEMATECH's 3D program, Rudolph's inspection and metrology technologies will be applied to various projects including via depth and CD metrology, metallization void detection, stacked wafer via alignment, wafer edge defect detection and bump height coplanarity. www.rudolphtech.com Rudolph NSX inspection tool for 3-D structures Rudolph <strong>announce</strong>s new 3D IC metrology tool for copper thickness measurements Rudolph Technologies <strong>announce</strong>d the availability of its new MetaPULSE(R)-G thin film measurement tool optimized specifically for copper damascene processes at 45nm through 22nm technology nodes and copper via fill in new 3D IC applications. Copper thickness and overburden measurements are critical in optimizing the CMP process that follows deposition during through-silicon via (TSV) manufacturing. The new tool measures 60-80 product wafers per hour with gauge-capable precision and reduced cost of ownership. Rudolph is accepting orders now with initial shipments planned for the fourth quarter of 2009. www.rudolphtech.com <strong>3M</strong> & <strong>SUSS</strong> <strong>announce</strong> <strong>agreement</strong> on temporary wafer bonding technology to enable 3-D IC semiconductors from page 1 This is particularly important in the multiple hightemperature cycles required in subsequent wafer processing steps. After processing, <strong>3M</strong>’s unique Light-To-Heat Conversion layer allows low stress, room temperature debonding of the thinned wafer directly to the tape carrier. The thinned wafer is supported throughout the entire process reducing warpage, stress and process complexity compared to other processes that require high-temperature exposure and stress to the thinned wafer, or solvents to release the temporary bonding material. <strong>3M</strong>’s WSS enables wafer processing currently in high-volume production at multiple semiconductor sites worldwide. “<strong>SUSS</strong> MicroTec is a recognized leader in wafer bonding and applications for 3-D and MEMS markets. Working with an industry leader, like <strong>SUSS</strong>, allows <strong>3M</strong> to focus on advanced materials development. The joint efforts of both companies provide <strong>3M</strong> customers with improved support, lower overall costs and faster access to more advanced solutions for their demanding 3-D packaging requirements,” commented Mike Bowman, marketing development manager for <strong>3M</strong> Electronics Markets Materials Division. “We are pleased to collaborate with a leading material expert like <strong>3M</strong> to offer customers a leading edge temporary bonding process with superior performance compared to current materials and processes on the market,” said Wilfried Bair, general manager, Wafer Bonder Division, <strong>SUSS</strong> MicroTec. “This relationship and process offering fits nicely with <strong>SUSS</strong> MicroTec’s 3-D strategy to provide a flexible and modular bonding platform that can be configured to meet customers’ needs.” www.<strong>3M</strong>.com Alchimer raises $10 million to expand global customer support and broaden new IP development from page 1 e expect Alchimer to make a significant “Wcontribution to 3D-packaging technology, which will play an important role in the development of next-generation devices,” said Jean-Philippe Stefanini, general partner of Grenoble, Francebased Emertec Gestion. “Alchimer is an ideal fit for our portfolio, and we have great confidence in its experienced management team.” “The continued support of investors, especially in this difficult economic environment, is a solid endorsement of Alchimer’s innovative technology,” said Alchimer CEO Steve Lerner. “It also underscores the impact of Alchimer’s electrografting technology in enabling the emerging 3D market through process enhancement and cost reduction.” Alchimer recently <strong>announce</strong>d an enhancement of its eG ViaCoat process for the copper seed metallization of through-silicon vias (TSVs), which are used to create interconnections in advanced 3D-packaging applications. These structures are typically very narrow in comparison to their depth; this high aspect ratio creates a number of challenges to the deposition of uniform films. The eG ViaCoat process uses chemicals to deposit these films at levels of uniformity that meet or exceed standard industry quality metrics. In addition to having a number of process advantages, this “wet” approach allows the eG ViaCoat to be implemented on legacy plating equipment without retrofits or modifications. In further evidence of the company’s increasing acceptance as a low-cost alternative for TSV copper seed and related films, Alchimer <strong>announce</strong>d that it has signed an <strong>agreement</strong> with Nagase & Co. Ltd., a Tokyo-based technology-marketing company with an extensive background in chemicals, plastics and electronics. Nagase will help Alchimer meet rapidly increasing demand from key Japanese customers. www.alchimer.com Printed on recycled paper 15
Page 1 and 2: N e w s l e t t e r o n 3 D I C , T
Page 3 and 4: J U L Y 2 0 0 9 i s s u e n ° 1 1
Page 9 and 10: J U N E 2 0 0 9 i s s u e n ° 1 1
Page 13: J U L Y 2 0 0 9 i s s u e n ° 1 1

3M & SUSS announce agreement on temporary wafer ... - I-Micronews

You also want an ePaper? Increase the reach of your titles

Delete template?

Save as template?