3M & SUSS announce agreement on temporary wafer ... - I-Micronews

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J U L Y 2 0 0 9 i s s u e n ° 1 1 N e w s l e t t e r o n 3 D I C , T S V , W L P & E m b e d d e d T e c h n o l o g i e s C O M P A N Y P R O F I L E Printed on recycled paper YD: WLC manufacturing involves new technologies to be mastered. How the “traditional” camera module supply chain will be impacted by the introduction of WLC? GH & BK: The camera module supply chain is currently built around the premise of component-tocomponent assembly. Lenses and other optical components are obtained as discrete items, and assembled in to a barrel. Meanwhile, the imager die is attached and interconnected to a substrate using chip-on-board processes. A housing that goes over the die is attached to the substrate and the barrel screwed into the housing. Once the camera focus is correct the lens barrel is set in position. However this is not the entire picture. Camera modules manufactured from discrete parts are not compatible with solder reflow assembly. Consequently, the camera module has to be mounted on a flexible circuit that has an expensive connector at one end. Then, in yet another unique and serial process the camera module has to be aligned, attached and integrated into the cell phone housing or digital still camera body and the connector mated with its socket on the main PCB. The net result is that it can costs the cell phone manufacturer upto $4 to incorporate a $2 camera module (see Figure 3). The value proposition of the wafer level camera is that not only is the camera module cheaper per se, but it is reflow compatible so can be mounted on the main PCB at the same time as all the other surface mount components. In other words, at zero incremental cost to the cell phone manufacturer. One of the difficulties of any disruptive technology is that it is difficult to adapt the existing supply chain to start production, no matter how compelling the economic case. This is true in the case of reflowable wafer level cameras and thus far the majority of companies servicing this product are new entrants to the field of camera modules. New companies can afford to enter this space as they have no legacy contracts to fulfil, or equipment to write-off and the first adopters always get the highest value, which is sufficient to offset their investment costs. The emergence of wafer level cameras will either force the remainder of the supply chain to adopt to this technology or the new entrants simply grow until the volume demand is satisfied. In evaluating the impact wafer level cameras will have on the supply chain it is important to recognise that this innovation merely addresses cost and form factor. Wafer level cameras do not yet have any significant impact on performance. Performance improvements are likely to follow from the incorporation of technologies like Smart Optics, which give rise to features like continuous depth of field, ultra fast lenses and optical zoom with no moving parts. These developments can all be easily integrated into wafer level camera modules, but are either difficult or impossible to integrate with discrete assembly techniques. This will eventually lead to camera modules built using discrete assembly in the unhappy position of being physically larger, costing more and offering inferior performance. Based on this understanding, it is perhaps not surprising that market analysts predict that wafer level cameras will take more than 30% market share by 2012 [TSR, 2008]. YD: What are the benefits for camera module manufacturers to invest into new equipment and facilities for WLC? GH & BK: Although the raw cost benefits of wafer level camera technology may appear compelling, to enter this market still requires substantial investment in new equipment and facilities. Once this investment is made it provides the camera module manufacturer with great flexibility in terms of the product range and mix they can offer. This arises because the much of the equipment is common, irrespective of whether the manufacturing company wants to pursue a strategy of wafer level packaging of imagers, manufacturing wafer level optical assemblies or building complete camera modules. A combined product line maximises the return from the investment as the capacity of most equipment exceeds the requirements of relatively high volume manufacture, enabling multiple product types to be run simultaneously. Even better is that the same equipment set is used for camera modules ranging from QCIF to multi-mega pixel resolution so no additional investment will be required until the transition to 300mm diameter wafers occurs, towards which there are not yet any obvious moves. The current supply chain for camera modules fabricated from discrete parts is long with many entities involved, each adding margin. Wafer level camera assembly is done as a one-stop endeavour making it simultaneously a more profitable venture for the camera module manufacturer and reduced cost component for the system integrator. It is therefore unsurprising that the production of reflowable camera References: modules has ballooned from less than 1,000 per year in 2006 to 10,000 per month in 2008 [TSR 2008]. YD: Do WLC necessitate specific packaging, in particular with through Si vias? GH & BK: As might be expected, there are several competing wafer level optics technologies commercially available. To manufacture a camera module entails not just lens technology, but also the ability to package the imager at the wafer level and provide the package with a ball grid array interface. Connection of the bond pads on the die to the package lands requires a through silicon via (TSV) technology. The problem with TSVs is that they are bedevilled by high cost and questionable reliability. Several companies now offer TSV technology for image sensors, although only one meets the base cost necessary to achieve the sub-$1 VGA camera module and has published reliability data demonstrating the package will not only surpass by a wide margin the cell phone specification for reliability but also the more arduous automotive specification as well [IEEE 2008]. YD: To conclude, what is your future vision for WLC? GH & BK: Wafer level cameras are manufactured by combining, parts that are fabricated and assembled at the wafer level. Their value proposition is based on substantial savings in cost, much smaller form factor and a manufacturing line that is product agnostic. Realising this value entailed solving many technical issues. Wafer level camera technology is still in its infancy but so compelling are the benefits that fully reflow compatible, wafer-level cameras with VGA resolution have been developed, designed in product and manufacturing volume is ramping fast. Multi megapixel variants are not far behind. It is forecast that within 4 years reflowable wafer level cameras will account for more than 30% of the 2bn camera modules manufactured annually. Contact : Sales@tessera.com • SSEC 2009 Semiconductor International, 6th February 2009, “Inside wafer-level Cameras” • TSR 2008 Techo Systems Research Company Ltd, December 2008 Researching Report, “Market breakdown of camera phone – 1st half 2008 & 2nd half 2008 forecast” • IEEE 2008 G Humpston, “Novel and low cost through silicon via solution for wafer scale packaging of image sensors”, Proceedings IEEE Electrical Design of Advanced Packaging and Systems Symposium, Seoul, 10-12 December, 2008 8
J U N E 2 0 0 9 i s s u e n ° 1 1 N e w s l e t t e r o n 3 D I C , T S V , W L P & E m b e d d e d T e c h n o l o g i e s FROM INSPIRATION TO SOLUTION WITH LEADINGMEMS FABRICATION In MEMS fabrication the pioneering ASE® process from STS still dominates. Today, we continue to maintain our lead with unrivalled manufacturing experience and quality performance in MEMS fabrication. STS has the know-how to meet increasing demand for volume manufacture of MEMS devices, continually refining processes to turn advanced concepts into reality. For today and tomorrow, where STS leads others follow. To find out more visit: www.stsystems.com Courtesy of Sercalo Microtechnolgy Ltd MEMS COMPOUND SEMICONDUCTOR PHOTONICS ADVANCED PACKAGING DATA STORAGE Memory Applications Packaging & Integration Trends The new Yole studies will help you to understand how 3-D integration will challenge and reshape the memory industry? The memory semiconductor industry is about to go through a period of major technological changes as new integration trends and disruptive packaging technologies pave the way to the future growth of this industry … Report’s feature • Up-to-date Key metrics of the memory market: - Per application (more than 30 products screened) - Per type of memory (DRAM / SRAM / NOR / NAND Flash) - In Munits shipment and in 300mm wafer equivalent • Impact of 3-D integration on the memory market and applications • Key players strategy for 3DIC integration with memories • Cost analysis & challenges for TSV manufacturing: - How to make TSV interconnects happen in high volume/ low cost memory markets? Source: Yole Développement’s report For more information, please enter in contact with David Jourdan (jourdan@yole.fr - +33 472 83 01 90) 9
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3M & SUSS announce agreement on temporary wafer ... - I-Micronews

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