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ADVANCE INFORMATION<br />
<strong>UAC</strong> <strong>357xB</strong><br />
5.4. Pin Configuration<br />
USBCLK 1)<br />
USBWSO 1)<br />
USBDAT 1)<br />
TEST<br />
RES<br />
SUSPEND<br />
SOF<br />
SEN<br />
MCLK 1)<br />
VDD<br />
VSS<br />
DPLUS<br />
DMINUS<br />
VREG<br />
NC<br />
NC<br />
FOUTL<br />
FOPL<br />
FINL<br />
FOUTR<br />
FOPR<br />
FINR<br />
SREFO<br />
MICINR<br />
NC<br />
ADCR<br />
ADCREF<br />
ADCL<br />
MICBIAS<br />
MICINL<br />
SGND<br />
SREF<br />
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33<br />
49<br />
50<br />
51<br />
52<br />
53<br />
54<br />
55<br />
56<br />
57<br />
58<br />
59<br />
60<br />
61<br />
62<br />
63<br />
64<br />
<strong>UAC</strong> <strong>357xB</strong><br />
32<br />
31<br />
30<br />
29<br />
28<br />
27<br />
26<br />
25<br />
24<br />
23<br />
22<br />
21<br />
20<br />
19<br />
18<br />
17<br />
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16<br />
VBUS<br />
TRDY<br />
SCL 1)<br />
SDA 1)<br />
GPIO 0 1)<br />
GPIO 1 1)<br />
GPIO 2 1)<br />
GPIO 3 1)<br />
GPIO 4 1)<br />
GPIO 5 1)<br />
GPIO 6 1)<br />
GPIO 7 1)<br />
ADR0/GPIO 8 1)<br />
ADR1/GPIO 9 1)<br />
ADR2/GPIO 10 1)<br />
ADR3/GPIO 11/PWM 1)<br />
XTI<br />
XTO<br />
AREG1<br />
AVSS1<br />
AVSS0<br />
OUTL<br />
OUTR<br />
OUTC<br />
DAO 1)<br />
CLI 1)<br />
WSI 1)<br />
DAI<br />
STRB 1)<br />
RD 1)<br />
AVDD<br />
AREG0<br />
1) Switchable driver (weak/strong)<br />
Fig. 5–3: PMQFP64-2 and PQFN64-1 package<br />
Micronas Aug. 20, 2004; 6251-650-1AI 35
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