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<strong>UAC</strong> <strong>357xB</strong><br />
ADVANCE INFORMATION<br />
5.5. Pin Circuits<br />
RES<br />
ext. filter network<br />
N<br />
actres<br />
FOUTn<br />
FOPn<br />
FINn<br />
GND<br />
Fig. 5–8: Input Pins RES, TEST, SEN, DAI<br />
SREF<br />
Fig. 5–4: Pins FINR, FOPR, FINL, FOPL<br />
MICINL/R<br />
−<br />
+<br />
A<br />
D<br />
SREF<br />
SGND<br />
115 kΩ<br />
SREF<br />
Fig. 5–9: Analog input pins MICINL, MICINR<br />
Fig. 5–5: Pins SREF, SGND<br />
ADCL/R<br />
−<br />
+<br />
A<br />
D<br />
ADCREF<br />
SREF<br />
FOUTn<br />
Fig. 5–10: Analog input pins ADCL, ADCR<br />
SREF<br />
SREF<br />
+<br />
-<br />
MICBIAS<br />
Fig. 5–6: Output Pins FOUTL, FOUTR<br />
AREG1<br />
Fig. 5–11: Micbias Output pin<br />
XTI<br />
P<br />
P<br />
P<br />
N<br />
XTO<br />
OUTn<br />
Enable<br />
N<br />
N<br />
AVSS1<br />
SREF<br />
Fig. 5–12: Output Pins OUTL, OUTR<br />
Fig. 5–7: Clock oscillator XTI, XTO<br />
36 Aug. 20, 2004; 6251-650-1AI Micronas
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