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CODING AND ACTIVATING THE MC68HC908MR16 ADC Looking at the MC68HC908MR16 datasheet, I found that the MC68HC 908MR16 houses a 10-channel analogto-digital converter module with 10 bits of resolution (0x3FF or 0b1111111111 full scale). In a nutshell, the MC68HC908MR16 employs an analog multiplexer to select one of 10 analog input channels that feed a successive approximation-based analog-to-digital converter subsystem, which signals the end of an analog-todigital conversion by raising a flag or generating an interrupt request. The 10- bit analog-to-digital conversion result is placed in a pair of special-purpose MC68HC908MR16 data registers, ADRH and ARDL. For now, let’s put the MC68HC908MR16 datasheet aside and see what the ADC Bean can do for us. The BEAN configuration process for the ADC BEAN is identical to that of the RS-232 and LED_BIT Beans we configured previously. I accessed the Bean Selector window and doubleclicked the ADC Bean to insert it into the new ADC project, which is called MR16_ADC. I noticed that the analog input was assigned to the I/O pin that I was using for the LED. I still want to blink the LED as a run indicator and I don’t want to change or throw away the LED code I’ve already written. So, I deleted the newly inserted ADC Bean and moved to the Port I/O folder in the Bean Selector window. Once there, I double-clicked on the BitIO Bean and inserted it into my new MR16_ADC project. Once I saw that the LED had once again assumed my desired position on Port B, I configured the LED_BIT Bean to match the configuration I laid out in the previous RS-232 application we just discussed. I then reinserted the ADC Bean, saw that it was assigned to the next available Port B I/O pin, named it ANALOG, and started the Bean configuration process. The Bean Inspector wouldn’t let me enter anything that would jeopardize the functionality of the MC68HC908MR16 analog-to-digital ■ SCHEMATIC 1 +5VDC TXD RXD GND 2 RST 4 IRQ 6 PTA0 8 PTC2 10 PTC3 12 PTC4 14 PTA7 16 2 1 3 20 12 17 U3 T1IN T2IN R1OUT R2OUT V- V- J1 1 3 5 7 9 11 13 15 MON08 HEADER T1OUT T2OUT R1IN R2IN C2+ C2+ C2- C2- SP233ACP 28 March 2006 5 18 4 19 11 15 16 10 SP233ACP PIN 7 = +5VDC SP233ACP PINS 6,9 = GND C3 .1 C1 20p TXOUT RXIN C4 .1 Y1 4.9152 MHz R1 10M DB9 FEMALE VCC SP233ACP BYPASS CAP C9 .1 C2 20p RXIN C5 .1 9 7 5 3 1 PTA7 JR2A 9 VCC U1 9 VDDAD C6 50 40 VDDAD .1 12 VDD VREFH 10 54 VSSAD 41 VSSAD 11 VSS VREFL 7 8 5 6 3 4 1 2 PTA0 8 6 4 2 55 56 57 58 59 60 61 62 18 19 20 21 22 23 24 52 53 25 26 27 28 30 PA0 PA1 PA2 PA3 PA4 PA5 PA6 PA7 PD0 PD1 PD2 PD3 PD4 PD5 PD6 OSC1 OSC2 PWM1 PWM2 PWM3 PWM4 PWM5 31 29 PWM6 PWMGND MC68HC908MR16 TXOUT PF0 42 PF1 43 PF2 44 PF3 45 PF4 46 PF5 47 PB0 PB1 PB2 PB3 PB4 PB5 PB6 PB7 63 64 1 2 3 4 5 6 PC0 7 PC1 8 PC2 13 PC3 14 PC4 15 PC5 16 PC6 17 PE0 32 PE1 33 PE2 34 PE3 35 PE4 36 PE5 37 PE6 38 PE7 39 RST 49 IRQ 48 51 CGMXFC C7 .022 RXD TXD ADC INPUT PTC2 PTC3 PTC4 IRQ VCC R2 100K C8 .1 1 D1 LED +5VDC 3 + A - 2 R3 10K AIRTRONICS 94102 SERVO NOTES: 1. LED D1 HAS BUILT-IN CURRENT LIMIT RESISTOR
THE DESIGN CYCLE converter. Although there were multiple choices for analog-to-digital converter resolution offered, all of them were disabled with the exception of one. I was forced to choose 10 bits of analogto-digital converter resolution and I was offered only two choices for conversion time, which were 18.446 µS and 27.669 µS. I chose the 27.669 µS conversion time as its error percentage was specified at 0.000979% versus 2.479% for the 18.446 µS conversion time. Within the Methods area of the ADC Bean, I decided to allow the full use of the 10 bits of resolution and nixed any code generation that truncated the analog-to-digital converter’s output to eight bits. After compiling the MR16_ADC project for the first time to establish the project’s supporting file system and the Bean code for the ANALOG.c file, I copied the MR16_RS232 project’s LED blinker code — the endless loop structure — and related includes and variable definitions into the ADC project’s MR16_ADC.c application file. As we discovered earlier, I again had to change the PLL value from 0x1E to 0x66 in the MR16_ADC project’s Cpu.c file so that the PLL could lock and provide an accurate clock signal. At this point, I should have a simple LED blinker. Just to check things out, I compiled the project again and loaded it into the MC68HC908MR16. The LED blinked as designed. Things are good. From experience, we know that the Processor Expert has generated all of the necessary analog-to-digital converter initialization files, which it placed in a file named after the ADC Bean (ANALOG.c). Before we start to add any analog-to-digital converter functions and macros to our project, let’s examine the initialization actions that were taken against the analog-to-digital converter configuration registers. Access the package of MC68HC908MR16 projects you’ve downloaded from the <strong>Nuts</strong> & <strong>Volts</strong> or EDTP websites and pull up your copy of ANALOG.c from within the MR16_ANALOG project. ADCLK is the first analog-to-digital converter register that is altered in the analogto-digital converter initialization function ANALOG_Init. The macro setReg8 is used to load the ADCLK register with 0x64. The MC68HC908MR16 datasheet tells us that the three most significant bits of the most significant nibble (0b011x) determines the ADC Clock Divide Ratio, which in our case divides the ADC clock by eight. The least significant bit of the most significant nibble (0bxxx0) has a value of zero, which tells us that the analog-todigital converter is getting its clock from the external clock (CGMXCLK). Recall that the frequency of CGMXCLK is equal to the frequency of the crystal, which is, for us, 4.9152 MHz. The MC68HC908MR16 datasheet goes on to say that the analog-to-digital converter internal clock must lie between 500 kHz and 1.048 MHz. This internal ADC clock frequency range is called f ADIC . We know that our analogto-digital converter clock divisor is 8 and our CGMXCLK is 4.9152 MHz. We can calculate our f ADIC as follows: f ADIC Now that we’ve calculated f ADIC , which is also our ADC frequency, and found it to be within specifications; we can apply some simple math and justify that conversion time figure of 27.669 µS that the Bean Inspector forced me to choose. Analog-to-digital converter conversion time is defined as follows: I’ll save us some time and tell you that the Bean Inspector does not use 16 cycles to compute the analog-to-digital converter conversion time. So, substituting the known values we’ve previously dug up and using 17 ADC cycles: Okay, another mystery solved. Now, let’s finish up deciphering the ADCLK value. I specified right justified analog-to-digital converter results in the ANALOG Bean configuration. That is reflected by the two most significant bits of the least significant nibble of the ADCLK value (0bxxxx01xx). Bits 0 and 1 of the ADCLK register are always zero. The ADSCR (ADC Status and Control Register) is the next register acted upon by the ANALOG_Init function. Again, a setReg8 macro loads the ADSCR register. This time the value loaded is 0x1F, which powers off the analog-to-digital converter module. Hopefully, we’ll see some code later that enables the analog-todigital converter and looks for input from our designated analog input pin. With that, let’s put some analog-todigital converter code together. Listing 3 is a code snippet that is taken from the MR16_ADC.c file. Let’s talk about it from top to bottom. The variable ANALOG_OutV is defined in the ANALOG.c file. To use it here, we must declare it as an external variable. The rest of the variable declarations aren’t new. However, I did throw out the “a” and substituted “result” to make things a bit more readable in the source code. The variable declarations are followed by a call to initialize the = CGMXCLK / ADC Clock Divide Ratio = 4.9152MHz/8 = 614.4kHz Conversion Time = 16 to 17 ADC Cycles / ADC Frequency Conversion Time = 17 / 614.4kHz = 27.669uS MC68HC908MR16 and the peripherals within it we have chosen to use. The ball starts to roll when we initiate the analog-to-digital conversion using the ADC Bean’s ANALOG_ Measure function. I have chosen to only take and process one ADC value at a time. The CodeWarrior Development Studio for HC08 v5.0 C compiler does not include printf functionality automatically in the libraries. So, instead of implementing the printf workarounds presented in the help text, I resorted to caveman tactics to convert the hexadecimal analog voltage readings into something a human can read. In true caveman style, I allocated four bytes (ones, tens, hundreds, thousands) to represent a number in the format of x.xxx decimal. I also provided a +5.12V power supply for the MC68HC908MR16 hardware to provide for 0.005-volt steps for all of 1024 (0 through 1023) steps of the 10-bit analog-to-digital converter (+5.12V / 1024 = 0.005V per step). March 2006 29
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