Nuts & Volts

THE DESIGN CYCLE
converter. Although there were multiple
choices for analog-to-digital converter
resolution offered, all of them were
disabled with the exception of one. I
was forced to choose 10 bits of analogto-digital
converter resolution and I was
offered only two choices for conversion
time, which were 18.446 µS and 27.669
µS. I chose the 27.669 µS conversion
time as its error percentage was
specified at 0.000979% versus 2.479%
for the 18.446 µS conversion time.
Within the Methods area of the
ADC Bean, I decided to allow the full
use of the 10 bits of resolution and
nixed any code generation that
truncated the analog-to-digital converter’s
output to eight bits. After
compiling the MR16_ADC project for
the first time to establish the project’s
supporting file system and the Bean
code for the ANALOG.c file, I copied
the MR16_RS232 project’s LED blinker
code — the endless loop structure
— and related includes and variable
definitions into the ADC project’s
MR16_ADC.c application file.
As we discovered earlier, I again
had to change the PLL value from
0x1E to 0x66 in the MR16_ADC
project’s Cpu.c file so that the PLL
could lock and provide an accurate
clock signal. At this point, I should
have a simple LED blinker. Just to
check things out, I compiled the
project again and loaded it into the
MC68HC908MR16. The LED blinked
as designed. Things are good.
From experience, we know that the
Processor Expert has generated all of
the necessary analog-to-digital converter
initialization files, which it placed in
a file named after the ADC Bean
(ANALOG.c). Before we start to add any
analog-to-digital converter functions
and macros to our project, let’s examine
the initialization actions that were
taken against the analog-to-digital
converter configuration registers.
Access the package of
MC68HC908MR16 projects you’ve
downloaded from the Nuts & Volts or
EDTP websites and pull up your copy
of ANALOG.c from within the
MR16_ANALOG project. ADCLK is
the first analog-to-digital converter
register that is altered in the analogto-digital
converter initialization
function ANALOG_Init. The macro
setReg8 is used to load the ADCLK register
with 0x64. The MC68HC908MR16
datasheet tells us that the three most
significant bits of the most significant
nibble (0b011x) determines the ADC
Clock Divide Ratio, which in our case
divides the ADC clock by eight. The
least significant bit of the most significant
nibble (0bxxx0) has a value of
zero, which tells us that the analog-todigital
converter is getting its clock
from the external clock (CGMXCLK).
Recall that the frequency of
CGMXCLK is equal to the frequency of
the crystal, which is, for us, 4.9152
MHz. The MC68HC908MR16 datasheet
goes on to say that the analog-to-digital
converter internal clock must lie
between 500 kHz and 1.048 MHz. This
internal ADC clock frequency range is
called f ADIC . We know that our analogto-digital
converter clock divisor is 8
and our CGMXCLK is 4.9152 MHz. We
can calculate our f ADIC as follows:
f ADIC
Now that we’ve calculated f ADIC ,
which is also our ADC frequency, and
found it to be within specifications; we
can apply some simple math and justify
that conversion time figure of 27.669
µS that the Bean Inspector forced me
to choose. Analog-to-digital converter
conversion time is defined as follows:
I’ll save us some time and tell you
that the Bean Inspector does not use 16
cycles to compute the analog-to-digital
converter conversion time. So, substituting
the known values we’ve previously
dug up and using 17 ADC cycles:
Okay, another mystery solved.
Now, let’s finish up deciphering the
ADCLK value. I specified right
justified analog-to-digital converter
results in the ANALOG Bean configuration.
That is reflected by the two
most significant bits of the least
significant nibble of the ADCLK value
(0bxxxx01xx). Bits 0 and 1 of the
ADCLK register are always zero.
The ADSCR (ADC Status and
Control Register) is the next register
acted upon by the ANALOG_Init function.
Again, a setReg8 macro loads
the ADSCR register. This time the
value loaded is 0x1F, which powers
off the analog-to-digital converter
module. Hopefully, we’ll see some
code later that enables the analog-todigital
converter and looks for input
from our designated analog input pin.
With that, let’s put some analog-todigital
converter code together.
Listing 3 is a code snippet that is
taken from the MR16_ADC.c file. Let’s
talk about it from top to bottom.
The variable ANALOG_OutV is
defined in the ANALOG.c file. To use it
here, we must declare it as an external
variable. The rest of the variable declarations
aren’t new. However, I did throw
out the “a” and substituted “result” to
make things a bit more readable in the
source code. The variable declarations
are followed by a call to initialize the
= CGMXCLK / ADC Clock Divide Ratio = 4.9152MHz/8 = 614.4kHz
Conversion Time = 16 to 17 ADC Cycles / ADC Frequency
Conversion Time = 17 / 614.4kHz = 27.669uS
MC68HC908MR16 and the peripherals
within it we have chosen to use.
The ball starts to roll when we initiate
the analog-to-digital conversion
using the ADC Bean’s ANALOG_
Measure function. I have chosen to
only take and process one ADC value
at a time. The CodeWarrior
Development Studio for HC08 v5.0 C
compiler does not include printf functionality
automatically in the libraries.
So, instead of implementing the printf
workarounds presented in the help
text, I resorted to caveman tactics to
convert the hexadecimal analog
voltage readings into something
a human can read.
In true caveman style, I allocated
four bytes (ones, tens, hundreds,
thousands) to represent a number in
the format of x.xxx decimal. I also
provided a +5.12V power supply for
the MC68HC908MR16 hardware to
provide for 0.005-volt steps for all
of 1024 (0 through 1023) steps of the
10-bit analog-to-digital converter
(+5.12V / 1024 = 0.005V per step).
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