DCP Series Maintenance Software Test Level 3 - Public Support ...

Error Messages and Fault Isolation
Bit 31 The IOP sets this bit if a status bit is set and its corresponding chain flag is clear.
This action occurs only after the LM status is passed to the IOP. The line module
does not set this bit.
FEPI Input Status
When Start Data (Input) instruction execution is initiated, the line module status bytes are
cleared and then status conditions are accumulated to indicate the cause of abnormal
termination. The Read Status command, issued to the line module by the IOP on
termination, causes two bytes of status to be returned to the IOP.
The IOP adds the status bits for which it is responsible. The resulting status format, as
stored in the Message Control Table, is as follows:
���������������������������������������������������������� �������
����� � �� � ����� � � ���� � ������� �
������ � ������� ����� � � ����� � � ����� �
������������������������������������������������ �����������������
���������������������������������������������������������� �������
� ��� � ������� � �� � ���� � � ���� ������� �
� ����� � ������ ��������� ���� � � ��� ������� �
������������������������������������������������ �����������������
Bit 16 Set by the IOP when allocating input space and the zeroed buffer pool is empty.
This action causes unconditional termination. The line module does not set this
bit.
Bit 17 Set by the IOP when the input limit is reached and input chain flag 17 is set. The
line module does not set this bit. This action causes unconditional termination.
Bit 20 Set if input response timer expires. This action causes unconditional termination.
(If the response timer is loaded with zero, the timer is disabled and this bit is not
set.)
Note: The response timer goes active as soon as it is loaded with a non-zero
value during Start Data Transmit execution. The response timer stops
when the input is completed.
Bit 23 Set by the line module if the input is terminated by a System Reset from the host.
This action causes unconditional termination.
Bit 24 Set by the line module if the input is terminated by selective reset from the host.
This action causes unconditional termination.
Bit 26 Set by the line module if a data parity error is detected during data transfer from
the host. This action causes unconditional termination.
Bit 27 Set by the line module if no Write or Pre-write command from the host was active
when the input Start Data Transmit was executed. This action causes
unconditional termination.
B–48 7431 8080–202