DCP Series Maintenance Software Test Level 3 - Public Support ...
DCP Series Maintenance Software Test Level 3 - Public Support ...
DCP Series Maintenance Software Test Level 3 - Public Support ...
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Error Messages and Fault Isolation<br />
Bit 22 Set by the line module if the line module is off-line to the host when output SDI<br />
execution is attempted. This bit is always set when the line module is off-line,<br />
even during loopback operations. However, in the latter case, the off-line<br />
condition does not terminate the data transfer.<br />
Bit 23 Set by the line module if the output is terminated by a System Reset from the host.<br />
Bit 24 Set by the line module if the output is terminated by a Selective Reset from the<br />
host.<br />
Bit 25 Set by the line module if the output is terminated by an interface disconnect or a<br />
terminate command from the host.<br />
Bit 26 Set by the line module if a data parity error is detected during data transfer from<br />
the host. This action causes a conditional termination.<br />
Bit 27 Set by the line module if no Write command from the host was active when the<br />
input Start Data Transmit was executed. This bit can be set even though the<br />
channel state indicated a Write command was active if the line module received a<br />
Terminate command or ISS with Interface Disconnect before the Start Data<br />
Transmit was executed.<br />
Bit 28 Set by the line module when an input data transfer is terminated either by the CLC<br />
or the host and the line module is holding data it is unable to transfer to the CLC.<br />
Bit 29 Set by the line module if function flag bit 13 (loopback) is set and the line module<br />
is on line, or if function flag bit 13 is not set and the line module is off-line. In the<br />
latter case, the Off-line bit (bit 22) is also set.<br />
Bit 30 Set by the line module if the input is terminated by a Stop sequence from the host.<br />
Bit 31 The CLC sets this bit if a status bit is set and its corresponding chain flag is clear.<br />
This action occurs only after the LM status is passed to the CLC. The line module<br />
does not set this bit.<br />
B–60 7431 8080–202