VS1003 Datasheet - VLSI Solution

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VS10039 OPERATION9.8.2 Pin TestPin test is activated with the 8-byte sequence 0x50 0xED 0x6E 0x54 0 0 0 0. This test is meantfor chip production testing only.9.8.3 Memory TestMemory test mode is initialized with the 8-byte sequence 0x4D 0xEA 0x6D 0x54 0 0 0 0. Afterthis sequence, wait for 500000 clock cycles. The result can be read from the SCI registerSCI_HDAT0, and ’one’ bits are interpreted as follows:Bit(s) Mask Meaning15 0x8000 Test finished14:7 Unused6 0x0040 Mux test succeeded5 0x0020 Good I RAM4 0x0010 Good Y RAM3 0x0008 Good X RAM2 0x0004 Good I ROM1 0x0002 Good Y ROM0 0x0001 Good X ROM0x807fAll okMemory tests overwrite the current contents of the RAM memories.9.8.4 SCI TestSci test is initialized with the 8-byte sequence 0x53 0x70 0xEE n 0 0 0 0, where n is theregister number to test. The content of the given register is read and copied to SCI_HDAT0. Ifthe register to be tested is HDAT0, the result is copied to SCI_HDAT1.Example: if n is 0, contents of SCI register 0 (SCI_MODE) is copied to SCI_HDAT0.Version: 1.06, 2012-03-16 44
VS100310 VS1003 REGISTERS10 VS1003 Registers10.1 Who Needs to Read This ChapterUser software is required when a user wishes to add some own functionality like DSP effectsto VS1003.However, most users of VS1003 don’t need to worry about writing their own code, or about thischapter, including those who only download software plug-ins from VLSI Solution’s Web site.10.2 The Processor CoreVS_DSP is a 16/32-bit DSP processor core that also had extensive all-purpose processor features.VLSI Solution’s free VSKIT Software Package contains all the tools and documentationneeded to write, simulate and debug Assembly Language or Extended ANSI C programs for theVS_DSP processor core. VLSI Solution also offers a full Integrated Development EnvironmentVSIDE for full debug capabilities.10.3 VS1003 Memory MapVS1003’s Memory Map is shown in Figure 18.10.4 SCI RegistersSCI registers described in Chapter 8.6 can be found here between 0xC000..0xC00F. In additionto these registers, there is one in address 0xC010, called SCI_CHANGE.SCI registers, prefix SCI_Reg Type Reset Abbrev[bits] Description0xC010 r 0 CHANGE[5:0] Last SCI access address.SCI_CHANGE bitsName Bits DescriptionSCI_CH_WRITE 4 1 if last access was a write cycle.SCI_CH_ADDR 3:0 SPI address of last access.Version: 1.06, 2012-03-16 45
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Page 6 and 7: VS10033 DEFINITIONS1 LicensesMPEG L
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VS1003 Datasheet - VLSI Solution

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