Introduction to Cadence - UPC

There are Views that contain the information necessary to simulate the cells. Behavioral descriptions can besimulated directly, but other cells need a particular view for each different simulator. These simulation views arenormally found only in the lowest level of the design hierarchy (devices, passives, sources, etc). A particular caseis the digital cells from standard cell libraries, which have a symbol View that is also used for simulationpurposes.The following table shows typical vies for a digital and a analog basic cell:Digital basic cellabstractabstract_mlvscmos_schlayoutmspssymbolAnalog basic celladsauCdsauLvseldoeldoDhsimhsimDhspiceSlayoutspectrespectreSsymbolFrom the point of view of the simulation process (specifically, from the netlister tool point of view) there arethree categories of views:Stopping views:These views are the primitive views necessary for the simulators. They contain the properties necessary to informto the netlist generation process how the information must be written in a specific component. These viewsusually have the same name that the simulator (Spectre, SpectreS, hspiceS, eldo, etc). As mentioned before, somebehavioral descriptions using, for example, Verilog, VHDL or VerilogA languages are also stop views. Forexample, the ahdl view is a stop view that will be simulated with the SpectreAHDL simulator, a subprogram ofthe SPICE-like simulator Spectre.Switching views:These views are intermediate levels of the design hierarchy and they will always contain instances to cells withother structural or stop views. The commonest structural view is schematic, that can contain basic elements likeresistors, capacitors or transistors, that will have a stop view (for example spectre) or other structural elementswith views of type schematic.The cmos.sch view is special a schematic view that appears in the digital cells to allow the transistor levelsimulation coexist with the logic simulation of the same cell.The views of type extracted are also structural, since they contain the devices and passive components extractedfrom layout of the circuit.Non simulation viewsSome views are not appropriate for simulation, like the physical design layout View. These views themselvescontain no useful information for any simulator but by applying some post-processing (the extraction ofparasitics and devices) they can be transformed into simulation views (for example, the extracted view).4 Introduction to schematic capture and simulation using Cadence DFW-II